Semiconductor Package Layout for Direct PIM-to-Logic Connection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor architectures face bottlenecks in data movement between memory and logic, particularly in high-performance computing and large-scale parallel operations, leading to inefficiencies and increased power consumption.

Innovation Solution

Implementing a Processing-In-Memory (PIM) die in a package-on-package (POP) structure, where the PIM die is directly connected to the logic die without conductive posts, utilizing a redistribution layer structure to optimize signal transmission paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional POP structure with conductive posts is used to connect memory die and logic die, then electrical connection is established, but data movement latency increases and operation speed decreases

Engineering Contradiction:
Improveoperation speedVSAvoiddata movement latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent removes the conductive posts from the signal transmission path between PIM die and logic die. By extracting this intermediate component, the signal can travel directly through the redistribution layer without detouring through conductive posts, thereby reducing data movement latency and improving operation speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the package structure into distinct functional layers: the lower package contains the logic die on the first redistribution layer structure, while the upper package contains the PIM die on the second redistribution layer structure. This segmentation allows optimized signal paths for different functions, with direct connection between PIM die and logic die through the redistribution layer without requiring conductive posts.

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If data is moved between separate memory and logic functions, then von Neumann architecture operates, but power consumption increases due to data movement

Engineering Contradiction:
Improvepower consumptionVSAvoiddata movement time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent merges memory and processing functions into a single PIM (Processing-In-Memory) die. This combination eliminates the need to move data between separate memory and logic units, thereby reducing both power consumption and data movement time. The PIM die can perform computations directly on stored data without requiring data transfer to external logic units.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If PIM die is connected through conductive posts in conventional POP structure, then electrical connection is established, but signal transmission path is lengthened

Engineering Contradiction:
Improvesignal integrityVSAvoidsignal transmission path length
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent extracts the conductive posts from the signal transmission path. By removing this intermediate connection component, the signal transmission path between PIM die and logic die is shortened, improving signal integrity and reducing transmission delays while maintaining reliable electrical connection through the redistribution layer.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250349809A1Semiconductor package and method for manufacturing the same
Publication Date: 2025.11.13 SAMSUNG ELECTRONICS CO LTD
  • US20250349809A1 patent drawing
  • US20250349809A1 patent drawing
  • US20250349809A1 patent drawing

AI summary

A semiconductor package including a first redistribution layer structure, a logic die on the first redistribution layer structure, a plurality of conductive posts on the first redistribution layer structure and next to the logic die, a second redistribution layer structure on the logic die, and a processing in memory (PIM) die on the second redistribution layer structure.