PIM MAC Circuit With CRC-Based Read/Write Fail Handling
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Solution Overview
Problem
Processing-in-memory (PIM) devices face challenges in efficiently performing multiplication and accumulation operations due to limitations in data communication between memory and processor, which hampers the performance of artificial intelligence applications, especially in deep learning processes where increased computation demands are exponential.
Innovation Solution
A PIM device is designed with a cyclic redundancy check (CRC) logic circuit and a multiplication and accumulation (MAC) operator that performs arithmetic operations directly within the device, generating operation results while handling write and read operations, and includes error correction mechanisms to ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If arithmetic operations are performed in a separate processor with memory, then data communication between memory and processor is required, but this limits the processing speed and performance of AI applications
Solution Approach 1:
The patent combines memory and arithmetic processing units into a single integrated device, allowing data to be processed in-place without transfer to a separate processor. This merging eliminates communication bottlenecks and improves processing speed for AI workloads.
Solution Approach 2:
The memory device is designed to perform multiple functions: storing data and executing arithmetic operations directly on the stored data. This multi-functionality allows the same hardware to serve both memory and processing roles, improving efficiency.
2Productivity
If the number of layers in neural networks is increased to improve AI performance, then computation requirements increase exponentially, but this demands more data communication between memory and processor
Solution Approach 1:
By integrating processing capabilities directly into the memory device, the patent eliminates the need for repeated data transfers between separate memory and processor units, thereby reducing energy consumption associated with data communication while supporting increased computational demands.
Solution Approach 2:
The memory device performs arithmetic operations on data while it is stored, eliminating the need to move data to another processor for computation. This self-service capability reduces energy loss from data communication.
3Speed
If arithmetic operations are performed directly in the PIM device, then data processing speed is improved, but error correction mechanisms are needed to ensure data integrity
Solution Approach 1:
The patent integrates error correction circuits within the same memory device that performs arithmetic operations, combining multiple functions (storage, processing, and error correction) into a single unified system rather than adding separate external components.
Solution Approach 2:
Dedicated error correction circuits act as intermediary components that monitor and correct data integrity issues during arithmetic operations, ensuring reliable computation without requiring complex external verification systems.
Data Source
AI summary
A processing-in-memory (PIM) device includes an CRC logic circuit configured to generate first write data, a first write fail check signal, second write data, and a second write fail check signal from first write input data and second write input data when a write operation in an operation mode is performed, and generate first converted data, a first fail flag signal, second converted data, and a second fail flag signal from first read data, a first read fail check signal, second read data, and a second read fail check signal when a read operation in the operation mode is performed; and a MAC operator configured to perform a MAC arithmetic operation for the first converted data and the second converted data, based on the first and second fail flag signals to generate MAC operation result data.