PIM Device MAC Operator ECC Logic Circuit Integration
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Solution Overview
Problem
Processing-in-memory (PIM) devices face challenges in efficiently performing multiplication/accumulation (MAC) operations due to limitations in data communication between separate processor and memory units, leading to degraded performance in artificial intelligence applications like deep learning, where increased computational demands require faster data processing.
Innovation Solution
A PIM device is configured with a MAC operator, error correction code (ECC) logic circuits, and storage regions to perform MAC operations directly within the device, incorporating ECC encoding and decoding to handle errors and optimize data processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a general hardware system with separate memory and processor is used, then the system structure is simple, but the data communication limitation degrades AI performance
Solution Approach 1:
The patent merges the processor and memory into a single integrated PIM device, where MAC operators are directly coupled to memory banks. This integration eliminates the need for separate data communication channels between processor and memory, thereby removing the communication bottleneck that limits AI performance in conventional systems.
2Productivity
If the number of layers in neural network is increased to improve AI performance, then the computational demand increases exponentially, but the data processing speed becomes insufficient
Solution Approach 1:
By integrating MAC operators directly within the memory device, the patent enables computation to occur at the location where data is stored. This eliminates data transfer delays and allows exponential growth in computational capacity to be matched by proportional increases in data processing speed, supporting deeper neural networks without performance degradation.
Solution Approach 2:
The patent performs error correction encoding on data before it is stored in memory banks. This preliminary action ensures that when data is read for MAC operations, errors can be detected and corrected without requiring re-reading or re-transmission, thereby maintaining high data processing speed even as computational demands increase with more network layers.
3Reliability
If ECC encoding and decoding operations are performed to handle errors, then the reliability of data processing is improved, but the processing time and complexity increase
Solution Approach 1:
The patent performs ECC encoding on data before writing it to memory banks, and performs decoding when reading data for MAC operations. By integrating these ECC operations directly into the memory device's data paths, the patent minimizes the time penalty associated with error correction, as the encoding and decoding occur in-line with normal read/write operations rather than as separate processing steps.
Data Source
AI summary
A Processing-In-Memory (PIM) device includes a MAC operator, a first storage region and an error correction code (ECC) logic circuit. The MAC operator performs MAC operation of first data and second data. The first storage region provides the first data to the MAC operator. The error correction code (ECC) logic circuit transmit first encoded data to the first storage region by performing a first ECC encoding operation on the first data. The error correction code (ECC) logic circuit transmit first decoded data generated by performing a first ECC decoding operation of the first encoded data transmitted from the first storage region to the MAC operator. The error correction code (ECC) logic circuit generates an error calculation result signal and transmit the an error calculation result signal to the MAC operator when the number of erroneous bits detected in the first ECC decoding operation exceed an error correction capability.