Processing-In-Memory MAC Integration for Lower Data-Movement Latency

The patent merges the processor and memory into a single integrated device, specifically combining MAC operators with memory banks to form a processing-in-memory architecture. This integration eliminates the need for data communication between separate processor and memory components, directly resolving the productivity limitation caused by separated architecture while managing device complexity through functional consolidation.

The integrated PIM device performs multiple functions within a single architecture: it stores data in memory banks and simultaneously performs arithmetic operations using MAC operators. This multi-functionality allows the device to handle both data storage and processing tasks, improving overall system productivity without requiring separate dedicated components for each function.

The patent segments the computational workload across multiple MAC operators (first to Lth MAC operators) that operate in parallel on different portions of data. Each MAC operator processes specific weight data from memory banks, allowing simultaneous execution of multiple arithmetic operations. This segmentation enables the system to handle increased computational requirements from deeper neural networks without proportionally increasing computation time.

The integrated PIM architecture enables continuous processing by eliminating data transfer delays between separate memory and processor components. Weight data is continuously supplied from memory banks to MAC operators, and results are continuously generated and output through data I/O circuits. This continuous operation maintains high computational throughput even as the number of neural network layers increases.