PIM System MAC Operator Memory Integration

The patent merges memory and processing units into a single integrated PIM device, allowing data to be processed directly within the memory structure. This eliminates the need for separate memory and processor components while maintaining manufacturing feasibility through unified device fabrication processes.

The patent introduces a new architectural dimension by embedding processing capabilities within the memory hierarchy, specifically using storage class memory structures that allow computational operations to occur at the memory level rather than requiring traditional processor-memory separation.

The patent introduces storage class memory as an intermediary structure between traditional memory and processing units, enabling data to be retained and processed in-place without requiring continuous data movement. This mediator structure reduces the computational overhead associated with processing large neural network layers.

The patent segments the processing function across multiple PIM devices or memory banks, allowing neural network computations to be distributed and parallelized. Each memory segment can independently perform MAC operations on different data portions, reducing the total computational burden on any single processing unit.

The patent designs the PIM device with universal memory structures that can serve both as storage medium and as processing substrate. The same memory cells and interconnect structures are used for both data storage and MAC operations, eliminating the need for separate processing circuits and reducing overall device complexity.

The memory structure is designed to perform MAC operations autonomously using its own internal resources, such as bitline and wordline signals for multiplication and accumulation. This self-service capability eliminates the need for external processing units and reduces the complexity of inter-device communication.