Processing-In-Memory Device MAC Unit Segmentation
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Solution Overview
Problem
The increasing complexity of neural networks in artificial intelligence requires more computation, which is hindered by the separation of memory and processor in traditional hardware systems, leading to performance degradation due to limited data communication between them.
Innovation Solution
A Processing-In-Memory (PIM) device and system that integrates a processor and memory on a semiconductor chip, utilizing MAC units with memory banks and command mapping registers to perform arithmetic operations directly, improving data processing speed in neural networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a general hardware system with separated memory and processor is used, then the system structure is simple and easy to manufacture, but the performance of artificial intelligence is degraded due to limited data communication between memory and processor
Solution Approach 1:
The patent merges the processor and memory into a single integrated PIM device, where MAC units are directly coupled to memory banks within the same semiconductor chip. This eliminates the need for separate memory and processor components, resolving the contradiction by combining functionality to improve AI performance while maintaining manufacturing feasibility through integrated circuit design
2Productivity
If the number of layers in neural network is increased to improve AI performance, then the computation requirement increases exponentially, but the data communication limitation between separated memory and processor hinders further performance improvement
Solution Approach 1:
By integrating memory and processing units into a single PIM device, the patent eliminates data communication delays between separate components. The MAC units perform computations directly on data stored in memory banks without external data transfer, thus resolving the time loss issue while enabling increased neural network layers and improved AI performance
3Speed
If PIM device integrates processor and memory in one semiconductor chip, then data processing speed is improved through direct arithmetic operations, but the device complexity increases
Solution Approach 1:
The patent segments the PIM device into multiple independent MAC units, each with its own memory bank and control logic. This segmentation allows parallel processing operations while maintaining modular design that manages device complexity. Each MAC unit can operate independently, achieving high data processing speed through parallelism while the modular structure keeps the overall device complexity manageable
Data Source
AI summary
A processing-in-memory (PIM) device includes a plurality of multiplication/accumulation (MAC) units, each of the MAC units including a memory bank and a MAC operator and performing one operation, among a memory operation and a PIM operation, a command mapping register generating one of a memory operation mode signal and a PIM operation mode signal based on a row address that is mapped to the PIM operation to be performed by the plurality of MAC units, and a command decoder generating a memory control signal for the memory operation and a PIM control signal for the PIM operation, wherein the command decoder is configured to generate the PIM control signal in response to the PIM operation mode signal and configured to transmit the PIM control signal to the plurality of MAC units, and configured to generate the memory control signal in response to the memory operation mode signal and configured to transmit the memory control signal to the plurality of MAC units.