PIM Management Apparatus for Cache Coherence and Locality
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Solution Overview
Problem
Existing processing-in-memory (PIM) structures face challenges such as unfamiliar program models, low compatibility with cache and virtual memory systems, and lack of consideration for memory access locality, leading to inefficient performance and compatibility issues.
Innovation Solution
A PIM management apparatus that uses a reader-writer lock and locality tracer to determine whether instructions should be executed in a processor or PIM based on data locality, ensuring cache coherence and virtual memory support, and optimizing memory access by executing high locality instructions in the processor and low locality instructions in memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If processing-in-memory (PIM) structure is used to perform computation in memory, then computation speed is improved, but compatibility with existing cache and virtual memory systems deteriorates
Solution Approach 1:
A PIM management apparatus is introduced as an intermediary between the processor and PIM structure. This apparatus includes a PIM directory with reader-writer locks and a locality tracer that mediates memory access requests, managing cache coherence and virtual memory translation to enable PIM operations while maintaining compatibility with existing system components.
Solution Approach 2:
The memory system is segmented into distinct functional components: traditional processor-based cache memory and PIM-based computation memory. The PIM management apparatus segments the management of these two memory types, allowing independent optimization while maintaining system-wide coherence through the directory and locality tracking mechanisms.
2Power
If all new types of accelerators are implemented in memory using PIM concept, then computation capability is improved, but program model complexity increases
Solution Approach 1:
The PIM management apparatus provides universal functionality that handles multiple types of memory access operations, cache coherence management, and virtual memory translation through a single unified interface. This allows existing applications to use PIM capabilities without being rewritten for specific accelerator models, as the management apparatus handles the complexity transparently.
Solution Approach 2:
The locality tracer automatically tracks memory access patterns and determines whether data is cached or stored in memory, making autonomous decisions about execution location. This self-service mechanism eliminates the need for programmers to manually manage accelerator configuration and data placement, reducing program model complexity while maintaining high computation capability.
3Quantity of substance
If data is always read from memory using PIM, then memory utilization is improved, but performance deteriorates when data fits in cache
Solution Approach 1:
The system dynamically adapts its data access strategy based on real-time cache status. The locality tracer continuously monitors whether accessed data is present in cache or must be read from memory, and the PIM management apparatus dynamically routes execution to either processor (when data is cached) or PIM (when data is in memory), optimizing performance for each access pattern.
Solution Approach 2:
The system changes the execution parameter (processor vs. PIM) based on the cache hit/miss status. When the locality tracer detects that data is in cache, execution is performed on the processor; when data is in memory, execution is performed on PIM. This parameter change optimizes both memory utilization and execution performance based on actual data location.
Data Source
AI summary
Provided is a method and apparatus for processing instructions using a processing-in-memory (PIM). A PIM management apparatus includes: a PIM directory comprising a reader-writer lock regarding a memory address that an instruction accesses; and a locality tracer configured to figure out locality regarding the memory address that the instruction accesses and determine whether or not an object that executes the instruction is a PIM.