Processing-in-Memory Offload for Low-Local Memory Tasks

Solution Overview

Problem

Existing computing systems face inefficiencies in processing performance and power consumption due to the need for frequent data transfer between processors and memory, particularly for memory-bound tasks with low locality, which are executed on-chip unnecessarily, wasting bandwidth and polluting caches.

Innovation Solution

Implementing a Processing-in-Memory (PIM) architecture that offloads system services such as page zeroing, copy-on-write operations, and memory migration to a PIM device, utilizing PIM Load, PIM Operation, and PIM Store instructions to execute these tasks closer to memory, reducing data movement and enhancing execution efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory-bound tasks with low locality are executed on the processor, then processing can be performed, but data transfer between processor and memory increases unnecessarily, wasting bandwidth and polluting caches

Engineering Contradiction:

Improveprocessing performanceVSAvoidenergy consumption

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent merges memory and processing units into a single integrated memory device with embedded processing capability. The processing unit is physically integrated within the memory device, allowing data to be processed in-place without being transferred to a separate processor, thereby eliminating unnecessary data transfer and reducing energy consumption.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a memory controller as an intermediary component that manages communication between the processor and the integrated memory device. The memory controller handles data transfer and coordination, enabling the processor to offload memory-bound tasks to the integrated processing unit while maintaining efficient data flow and reducing processor workload.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If memory-bound tasks with low locality are executed on the processor, then processing can be performed, but data movement increases unnecessarily, wasting bandwidth

Engineering Contradiction:

Improveprocessing performanceVSAvoiddata movement

Core Design Contradiction:

ProductivityVSQuantity of substance

Solution Approach 1:

The patent merges memory and processing units into a single integrated memory device with embedded processing capability. The processing unit is physically integrated within the memory device, allowing data to be processed in-place without being transferred to a separate processor, thereby eliminating unnecessary data transfer and reducing energy consumption.

Inventive Principle:

Principle #5Merging (Combining)

3Ease of operation

If functional units are implemented as part of the processor, then processing can be performed, but data must be accessed via bus between processor and memory, reducing efficiency

Engineering Contradiction:

Improveprocessing efficiencyVSAvoiddata access time

Core Design Contradiction:

Ease of operationVSLoss of time

Solution Approach 1:

The patent merges memory and processing units into a single integrated memory device with embedded processing capability. The processing unit is physically integrated within the memory device, allowing data to be processed in-place without being transferred to a separate processor, thereby eliminating unnecessary data transfer and reducing energy consumption.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12197378B2Method and apparatus to expedite system services using processing-in-memory (PIM)

Publication Date: 2025.01.14 ADVANCED MICRO DEVICES INC

AI summary

An apparatus configured for offloading system service tasks to a processing-in-memory (“PIM”) device includes an agent configured to: receive, from a host processor, a request to offload a memory task associated with a system service to the PIM device; determine at least one PIM command and at least one memory page associated with the host processor based upon the request; and issue the at least one PIM command to the PIM device for execution by the PIM device to perform the memory task upon the at least one memory page.