PIM Register Reuse via Constant-Value Cache
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Solution Overview
Problem
In computing systems, the frequent need to copy constant values from dynamic random-access memory (DRAM) to processing-in-memory (PIM) devices consumes bandwidth and energy, as these values are often reused in computations, leading to inefficient memory operations.
Innovation Solution
Implementing a control unit with a constant-value cache in the memory controller that tracks frequently used values and reuses them across computations by avoiding explicit copy commands, thereby reducing memory bandwidth utilization and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If constant values are copied from DRAM to PIM devices for each computation, then computational accuracy is maintained, but memory bandwidth utilization decreases and energy consumption increases
Solution Approach 1:
The memory controller pre-loads constant values into PIM registers before computation operations are executed. By performing the loading action in advance and reusing the values in registers during multiple computations, the system avoids repeated DRAM-to-PIM transfers, thereby reducing energy consumption while maintaining computational accuracy
Solution Approach 2:
PIM registers serve as an intermediary storage between DRAM and the computation units. Instead of directly copying constant values from DRAM to computation units for each operation, the system uses PIM registers as a buffer that can hold and reuse these values locally, reducing the frequency of memory access operations and associated energy costs
2Productivity
If constant values are copied from DRAM to PIM devices for each computation, then data freshness is ensured, but memory bandwidth utilization decreases
Solution Approach 1:
The memory controller pre-loads constant values into PIM registers before computation operations are executed. By performing the loading action in advance and reusing the values in registers during multiple computations, the system avoids repeated DRAM-to-PIM transfers, thereby reducing memory bandwidth consumption while maintaining computational accuracy
Solution Approach 2:
PIM registers serve as an intermediary storage between DRAM and the computation units. Instead of directly copying constant values from DRAM to computation units for each operation, the system uses PIM registers as a buffer that can hold and reuse these values locally, reducing the frequency of memory access operations and associated bandwidth usage
Data Source
AI summary
Systems, apparatuses, and methods for reusing remote registers in processing in memory (PIM) are disclosed. A system includes at least a host processor, a memory controller, and a PIM device. When the memory controller receives, from the host processor, an operation targeting the PIM device, the memory controller determines whether an optimization can be applied to the operation. The memory controller converts the operation into N PIM commands if the optimization is not applicable. Otherwise, the memory controller converts the operation into a N−1 PIM commands if the optimization is applicable. For example, if the operation involves reusing a constant value, a copy command can be omitted, resulting in memory bandwidth reduction and power consumption savings. In one scenario, the memory controller includes a constant-value cache, and the memory controller performs a lookup of the constant-value cache to determine if the optimization is applicable for a given operation.