PIM System Thermal Management via Segmented 3D Stacking
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Solution Overview
Problem
Processing-in-memory (PIM) systems face challenges in efficiently performing deep learning tasks due to the separation of memory and processor units, leading to degraded performance from limited data communication between them, which is exacerbated by the increasing complexity of neural networks requiring more computation.
Innovation Solution
A PIM system comprising a PIM device with a data storage region and an arithmetic circuit, integrated with a controller that controls the PIM device by transmitting arithmetic quantity data, and includes features like a command generator, operation mode determining part, scheduler, clock division control circuit, and address re-mapper to optimize operations based on temperature and data requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory and processor are separated into different units, then device architecture follows conventional design, but data communication between memory and processor is limited which degrades performance
Solution Approach 1:
The patent merges the processor and memory into a single integrated unit, where the processor includes both computing units for executing operations and storage units for storing data. This integration eliminates the communication bottleneck between separate memory and processor units, enabling direct access to data within the processor and significantly improving data processing speed for neural network operations.
2Productivity
If the number of layers in neural network is increased to improve AI performance, then AI performance improves, but the amount of computation required increases exponentially
Solution Approach 1:
The patent introduces a new dimensional approach by implementing three-dimensional vertically-stacked neural network operations within the integrated processor. This 3D architecture allows multiple layers of neural networks to be stacked vertically, enabling parallel processing of multiple operations simultaneously. This dimensional change reduces the computational burden on individual processing units while maintaining high AI performance through increased parallelism and reduced data movement requirements.
3Speed
If processor and memory are integrated in one semiconductor chip, then data processing speed improves, but temperature control becomes more challenging
Solution Approach 1:
The patent segments the integrated processor into distinct computing units and storage units that are vertically stacked and spatially separated within the chip architecture. This segmentation allows for differentiated thermal management strategies, where heat-generating computing units and heat-sensitive storage units are positioned at different vertical levels. The 3D stacking enables efficient heat dissipation pathways and allows for targeted cooling approaches, managing temperature control challenges while maintaining the performance benefits of integration.
Data Source
AI summary
A processing-in-memory (PIM) system includes a PIM device and a controller. The PIM device includes a data storage region and an arithmetic circuit for performing an arithmetic operation for data outputted from the data storage region. The controller is configured to control the PIM device. The PIM device is configured to transmit arithmetic quantity data of the arithmetic circuit to the controller in response to a request of the controller.