PIM Weight Arrangement Pattern for Convolution Row Skipping

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Solution Overview

Problem

The existing PIM architectures face challenges in maximizing the row-skipping ratio during convolution operations due to irregular weight distribution and increasing channel sizes, leading to lower probabilities of skipping rows with zero values, which hampers energy efficiency and computation speed.

Innovation Solution

A PIM control device and method that determines a weight arrangement pattern for the kernel considering the PIM array structure and weight sparsity, allowing for optimized mapping of weights to memory cells and skipping of convolution operations in rows with zero weights, thereby enhancing row-skipping ratios.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If row-skipping technique is applied to optimize computation speed, then operation speed is improved, but the row-skipping ratio is limited due to irregular weight distribution and increasing channel sizes

Engineering Contradiction:
Improveoperation speedVSAvoidrow-skipping ratio
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The patent applies preliminary action by reordering weights into the PIM array before convolution operations are executed. Specifically, weights are rearranged according to a predetermined pattern that groups zero-weight rows together, enabling the row-skipping technique to efficiently skip entire rows of operations in subsequent convolution steps, thereby achieving both high operation speed and high row-skipping ratio

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the arrangement parameter of weights in the PIM array from conventional random or standard ordering to a specific predetermined pattern. This parameter change reorganizes the weight matrix such that rows with zero weights are concentrated together, allowing the row-skipping technique to maximize the row-skipping ratio while maintaining high computation speed during convolution operations

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If channel size of weight is increased to handle more data, then data processing capability is improved, but the probability of row skipping decreases due to more rows being used

Engineering Contradiction:
Improvedata processing capabilityVSAvoidrow-skipping probability
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent applies preliminary action by reordering weights into the PIM array before convolution operations are executed. Specifically, weights are rearranged according to a predetermined pattern that groups zero-weight rows together, enabling the row-skipping technique to efficiently skip entire rows of operations in subsequent convolution steps, thereby achieving both high operation speed and high row-skipping ratio

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the arrangement parameter of weights in the PIM array from conventional random or standard ordering to a specific predetermined pattern. This parameter change reorganizes the weight matrix such that rows with zero weights are concentrated together, allowing the row-skipping technique to maximize the row-skipping ratio while maintaining high computation speed during convolution operations

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240220443A1Apparatus and method for controlling process-in-memory by accelerating convolution operation based on arranging pattern of weight in kernel, and storage medium storing instructions to perform method for controlling process-in-memory
Publication Date: 2024.07.04 RES & BUSINESS FOUND SUNGKYUNKWAN UNIV
  • US20240220443A1 patent drawing
  • US20240220443A1 patent drawing
  • US20240220443A1 patent drawing

AI summary

There is provided a processing-in-memory (PIM) control device. The device comprises a memory configured to store one or more instructions; and a processor configured to execute the one or more instructions stored in the memory, wherein the instructions, when executed by the processor, cause the processor to determine input data, weights, and information on a size of a kernel, which is a unit for performing convolution operations using the input data and the weights, determine a pattern for arranging each weight in the kernel, arrange first weights corresponding to the determined pattern in the kernel to map each first weight to a plurality of memory cells included in a PIM array, and control the PIM array to perform the convolution operations using first input data corresponding to the size of the kernel and the first weights.