Pin Access Location Visualization for IC Design
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Solution Overview
Problem
In advanced semiconductor manufacturing, particularly at feature sizes of 22 nm and below, it becomes increasingly difficult for designers to identify legal locations to access pins due to the complexity and number of design rules, leading to challenges in routing wires and vias without violating design rules, especially in submicron designs.
Innovation Solution
A method and system are provided to visually indicate legal pin access locations on an integrated circuit design using visual cues such as coloring, highlighting, and crosshairs, guiding users to access spots that avoid design rule violations during interactive editing, by preprocessing pin polygons to determine subsets of legal access points on the perimeter and interior.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If designers manually identify pin access locations in advanced technology nodes (22 nm and below), then design accuracy can be maintained, but the time and complexity of the design process increases significantly
Solution Approach 1:
The system pre-calculates and stores legal pin access locations before the actual routing design process. By performing the complex design rule checking and location validation in advance, the system prepares a database of valid access points that designers can quickly reference during manual routing, eliminating the need to perform time-consuming rule checks during the actual pin access identification process
Solution Approach 2:
The patent introduces an intermediary database or lookup table that stores pre-validated pin access locations. This intermediary structure acts as a bridge between the complex design rules and the designer's manual routing work, providing quick access to legally valid locations without requiring designers to manually evaluate design rules during the routing process
2Manufacturing precision
If the number of design rules is increased to ensure compliance in submicron designs, then manufacturing precision is improved, but the ease of operation for designers deteriorates
Solution Approach 1:
The system performs self-service by automatically validating pin access locations against all applicable design rules and storing the results in a pre-computed database. The design rules effectively validate themselves through automated checking, eliminating the need for designers to manually understand or apply complex rule sets during the routing process
Solution Approach 2:
The patent creates a simplified copy or representation of the complex design rule constraints by pre-calculating valid pin access locations. Instead of requiring designers to work directly with complex design rules, the system provides a simplified interface where designers can access pre-validated locations, effectively copying the essence of rule compliance into an easy-to-use format
Data Source
AI summary
Disclosed is a method and system for visualizing pin access locations on an integrated circuit design. Visual feedback is provided to a user that is attempting to connect a wire or a via to a pin structure polygon on the integrated circuit design. The visual feedback comprises any visual cue that provides an indication of a legal location to access the pin.