PIN Diode Anode Segmentation for Avalanche Resistance
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Solution Overview
Problem
Conventional PIN diodes face limitations in avalanche resistance, particularly experiencing thermal destruction due to electric field concentration in curved parts of the anode region during reverse bias, and existing methods to improve this either complicate the manufacturing process or reduce productivity.
Innovation Solution
A PIN diode configuration with a main anode region and a separated anode region connected through anode connecting regions, which are shaped to increase resistance and distribute avalanche current, preventing thermal destruction by moving the breakdown location to a lower potential site, thereby enhancing avalanche resistance without increasing manufacturing complexity or cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Field Limiting Rings (FLRs) are formed surrounding the anode region to reduce electric field concentration, then avalanche resistance is improved, but device complexity and manufacturing complexity increase
Solution Approach 1:
The anode region is segmented into a main anode region and a separated anode region, with the separated anode region forming an annular shape surrounding the main anode region. This segmentation creates multiple depletion layers that distribute and reduce electric field concentration at the curved parts, improving avalanche resistance without requiring additional FLR structures.
Solution Approach 2:
The separated anode region is specifically positioned at the curved parts where electric field concentration occurs. By forming P-type semiconductor regions with different impurity concentrations in specific locations (the annular separated anode region), the electric field distribution is locally optimized to prevent avalanche breakdown at critical points.
2Reliability
If conventional methods are used to improve avalanche resistance, then reliability is enhanced, but manufacturing process complexity increases
Solution Approach 1:
The functions of the main anode region and the separated anode region are merged into a single P-type semiconductor structure formed by one diffusion process. The separated anode region is integrated into the annular outer edge of the main anode region, eliminating the need for separate manufacturing steps while achieving both avalanche resistance improvement and manufacturing simplicity.
3Object-affected harmful factors
If the separated anode region is formed to distribute avalanche current, then thermal destruction is suppressed, but device complexity increases
Solution Approach 1:
The separated anode region is formed as an annular structure in the planar dimension, surrounding the main anode region. This dimensional arrangement creates additional current paths in the radial direction, distributing avalanche current away from the curved parts and reducing thermal concentration without adding vertical complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration effectively suppresses thermal destruction by distributing the avalanche current and increasing the resistance component, thereby improving avalanche resistance without complicating the manufacturing process or increasing costs.
Implementation Method 1
a depletion layer that is generated in the N− semiconductor layer by applying a reverse bias
Implementation Method 2
avalanche breakdown (electron avalanche breakdown). The avalanche breakdown occurs when a reverse bias exceeding a breakdown voltage (reverse breakdown voltage) is applied
Implementation Method 3
by selectively diffusing P-type impurities from a surface of the N− semiconductor layer 101b, the anode region 105 and the FLRs 104 are formed
Data Source
AI summary
Provided is a PIN diode that can suppress thermal destruction from occurring at the time of a reverse bias exceeding a breakdown voltage by current concentration on a curved part of an anode region. The PIN diode is configured to have: a semiconductor substrate 11 that includes an N+ semiconductor layer 1 and an N− semiconductor layer 2; a cathode electrode 18 that is formed on an outer surface of the N+ semiconductor layer 1; a main anode region 16, a separated anode region 15, and an anode connecting region that are formed by selectively diffusing P-type impurities from an outer surface of the N− semiconductor layer 2; and an anode electrode 17 that is formed on the main anode region 16.