Pin Memory Controller Data Segmentation for Semiconductor Test
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor memory devices face challenges in programming information data when the size of the memory in the test device is smaller than the size of the information data to be stored, particularly in non-volatile memory devices with 3-dimensional memory cell arrays, where the existing methods struggle to efficiently manage and program large data sets.
Innovation Solution
A semiconductor test system is developed with a pin memory and a pin memory controller that separates information data into multiple groups, sequentially transmits these groups to a pin memory, and programs them into a non-volatile memory with a 3-dimensional memory cell array, using a pin memory controller to manage the programming process by sending setup, data input, and confirm commands to ensure efficient data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the pin memory size is increased to store large information data, then the data storage capacity is improved, but the device complexity and cost increase
Solution Approach 1:
The pin memory controller divides the large information data into multiple smaller data groups that can be sequentially stored in the limited pin memory capacity. This segmentation allows the system to handle data larger than the pin memory size without requiring an increase in pin memory capacity, thus resolving the contradiction between storage capacity and device complexity
Solution Approach 2:
The pin memory controller performs preliminary actions by separating and preparing data groups before transmission to the nonvolatile memory. By pre-processing the data into manageable chunks and managing the transmission sequence, the system can effectively store large datasets without needing larger pin memory, avoiding increased device complexity
2Ease of manufacture
If the pin memory size is increased to accommodate large information data, then the programming capability is improved, but the manufacturing cost increases
Solution Approach 1:
The information data is segmented into multiple data groups that fit within the pin memory capacity. The pin memory controller manages this segmentation and sequential transmission, enabling programming of large datasets without requiring expensive increases in pin memory size, thus improving programming capability while controlling manufacturing cost
Solution Approach 2:
The pin memory controller acts as an intermediary between the data source and the nonvolatile memory. It manages the data flow by separating information data into groups, controlling sequential transmission to pin memory, and coordinating the programming process, thereby enabling large data programming without directly increasing pin memory capacity or manufacturing cost
3Speed
If information data is transmitted in a single large block, then the transmission speed is improved, but the pin memory capacity requirement increases
Solution Approach 1:
The system segments information data into multiple data groups for sequential transmission to pin memory. While this requires sequential rather than parallel transmission, the segmentation enables the use of smaller, more cost-effective pin memory while maintaining overall system efficiency through optimized group management and concurrent nonvolatile memory programming
Solution Approach 2:
The pin memory controller merges the transmission of multiple data groups into a coordinated sequence, where data groups are transmitted to pin memory and simultaneously programmed to nonvolatile memory. This merging of operations maintains transmission efficiency while working within the constraints of limited pin memory capacity
Data Source
AI summary
A semiconductor test system includes a nonvolatile memory and a test device. The nonvolatile memory is configured to include an information region. The test device is configured to include a pin memory and a pin memory controller. The pin memory controller is configured to separate information data into a plurality of information data groups, sequentially transmit the separated plurality of information data groups to the pin memory, sequentially transmit the transmitted plurality of information data group in the pin memory to the nonvolatile memory, and program the transmitted plurality of information data group in the nonvolatile memory into the information region.


