PIN Photodiode Lateral Ge Integration for Light Reception
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Solution Overview
Problem
Conventional PIN photodiodes with integrated Ge semiconductor material into Si substrates have a reduced light reception area due to electrode arrangement, leading to lower quantum yield and incompatibility with MOS manufacturing processes, increasing manufacturing costs.
Innovation Solution
A novel PIN photodiode structure with P-doped and N-doped regions disposed in the semiconductor substrate and a trench filled with Ge or Ge concentration gradient material between them, allowing for a larger light reception area and integration with MOS manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the first electrode region is disposed above the N-doped Si, then the manufacturing process is simplified, but the light reception area is reduced and quantum yield is lower
Solution Approach 1:
The patent transitions from a vertical electrode arrangement (above the N-doped Si) to a lateral arrangement within the substrate plane. The first electrode region is positioned at the side of the Ge semiconductor material in the same substrate plane, enabling light to incident from the top surface without being blocked by electrode structures, thus increasing the light reception area while maintaining manufacturing compatibility
2Speed
If the Ge semiconductor material is integrated into the Si substrate, then the carrier mobility is improved, but the manufacturing cost increases due to process incompatibility
Solution Approach 1:
The patent applies local quality by creating a laterally arranged Ge semiconductor material region within the Si substrate, where the Ge material is positioned specifically at the side of the intrinsic region rather than occupying the entire substrate. This localized integration maintains the high carrier mobility benefit of Ge while allowing the rest of the substrate to use conventional Si-based MOS processes, thereby reducing manufacturing costs
Solution Approach 2:
The patent merges the Ge semiconductor material integration with conventional MOS manufacturing processes by adopting a lateral arrangement that is compatible with standard CMOS fabrication techniques. The Ge region is formed using modified but still compatible process steps, enabling the combination of Ge's high carrier mobility with the cost-effective MOS manufacturing infrastructure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The novel structure enhances light reception area and reduces manufacturing costs by integrating with traditional MOS processes, improving the PIN photodiode's operational performance and compatibility.
Implementation Method 1
the incident photons create electrons, called photo-electrons, in the conduction band of the semiconductor if the photons have sufficient energy. Simultaneously, an electrical hole is left behind in the valence band and an electron-hole pair, or called photocarrier, is thus generated, which is also known as the photoelectric effect of the semiconductors
Implementation Method 2
the photo-electron and the corresponding hole are quickly separated under the influence of an inner electric field and an outer negative bias to be respectively collected at the positive electrode and the negative electrode
Data Source
AI summary
A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region.