Ping-Pong DMA Architecture for Data Transmission Efficiency
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Solution Overview
Problem
In existing DMA architectures, data transmission efficiency is low due to the need for the HOST to wait for the DMA descriptor controller to become idle before configuring it, especially during multiple data block read-write operations.
Innovation Solution
A ping-pong DMA architecture is implemented, where the current state of a register determines which DMA module configures and transmits data, allowing the second module to take over when the first is busy, thereby enabling continuous data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single DMA descriptor controller is used for data transmission, then the device complexity is low, but the data transmission efficiency deteriorates due to HOST waiting time
Solution Approach 1:
The single DMA descriptor controller is segmented into two independent DMA modules (first DMA module and second DMA module). Each module can independently configure and execute DMA operations, allowing parallel processing of different data blocks. This segmentation eliminates the HOST waiting time by enabling one module to work while the other is being configured, thus resolving the contradiction between transmission efficiency and device complexity.
Solution Approach 2:
The HOST can pre-configure one DMA module while the other is executing data transmission operations. By performing the configuration action in advance (before the current transmission completes), the HOST avoids idle waiting time. The ping-pong mechanism ensures that as one module finishes transmission, the pre-configured module is ready to take over immediately, maintaining continuous high-speed transmission.
2Loss of time
If the HOST waits for DMA descriptor controller to be idle before configuring, then the device complexity remains simple, but the loss of time increases
Solution Approach 1:
The ping-pong DMA architecture ensures continuous useful action by maintaining two operational states simultaneously: one DMA module is always in the data transmission phase while the other is in the configuration phase. This continuity eliminates idle waiting time for the HOST, as there is always a ready-to-execute module available. The state machine continuously transitions between these modules, ensuring no time is lost in the configuration-waiting cycle.
Data Source
AI summary
The present invention is about a data transmission method and a ping-pong DMA architecture. The method includes: acquiring the current state of an initialized register, determining a state type corresponding to the current state of the register, and performing an operation corresponding to the state type based on the state type determined by the register, the state type includes an initialization state, a state that the first DMA module is used, and a state that the second DMA module is used, the state that the first DMA module is used means a state when a previous batch of data is transmitted by the first DMA module, and the state that the second DMA module is used means a state when the previous batch of data is transmitted by the second DMA module. By using the above-mentioned method, data is configured by using the two DMA modules, when the first DMA module is busy, the second DMA module may also configure the data, and operations of data corresponding to the different states are performed according to the different states of the register, so that the purpose of increasing the data transmission efficiency is achieved.