Pinless Chip Package Structure for Shorter Signal Paths

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Solution Overview

Problem

Existing package structures for electronic products are large in size due to the use of pins and long wire-bond paths, which hinder miniaturization and integration, and pose a risk of parasitic effects.

Innovation Solution

A package structure that eliminates the need for pins by using a connecting assembly with a line layer to directly lead signals from the chip pad to the package body, incorporating a thermally conductive substrate for heat dissipation, and employing a heat sink for enhanced cooling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If pins are used in housing package or molding package, then the package structure can be formed with conventional pin-based packaging methods, but the product size becomes large

Engineering Contradiction:
Improvepackage structure formationVSAvoidproduct size
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent removes the pin component from the package structure entirely. Instead of using conventional pins that extend from the package body, the invention uses a wire-bond frame with integrated connection structures that eliminate the need for separate pins, thereby reducing the overall product size while maintaining electrical connectivity functions

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent combines the wire-bond frame structure with the package body connection function. The wire-bond frame serves dual purposes: it provides the mechanical support structure and simultaneously creates the electrical connection paths, merging what were previously separate components (frame + pins) into an integrated structure

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If pins are used in both housing package and molding package, then conventional packaging methods can be applied, but the wire-bond path becomes excessively long causing parasitic effects

Engineering Contradiction:
Improveconventional packaging methodVSAvoidparasitic effect
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and removes the pin component that necessitates long wire-bond paths. By using the wire-bond frame structure directly for connections, the wire-bond paths are significantly shortened, eliminating the source of parasitic effects while maintaining manufacturability through conventional wire-bonding processes

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The wire-bond frame acts as an intermediary structure that provides direct connection points within the package body. This intermediate structure eliminates the need for long external wire-bond paths by creating localized connection points, thereby reducing parasitic effects while maintaining electrical connectivity

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces the overall size and parasitic effects, facilitates miniaturization, and improves heat dissipation, while simplifying the manufacturing process and reducing assembly costs.

Implementation Method 1

incorporating a thermally conductive substrate for heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

employing a heat sink for enhanced cooling

Methodology Applied
Scientific EffectHeat dissipation: Heat Sink

Data Source

PatentUS12482724B2Package structure and package system
Publication Date: 2025.11.25 HUAWEI TECH CO LTD
  • US12482724B2 patent drawing
  • US12482724B2 patent drawing
  • US12482724B2 patent drawing

AI summary

This application discloses a package structure and a package system. The package structure may be used for packaging various types of chips, and is coupled to a PCB, so as to form the package system. The package structure includes a package base layer, a chip, a package body, and a connecting assembly. The package base layer has a first surface and a second surface that are opposite to each other. The chip is coupled to the first surface, and there is a chip pad on a surface that is of the chip and that is away from the package base layer. The package body covers the package base layer and the chip to protect the structure, and the chip pad is wired to a surface of the package body through the connecting assembly.