PIO Message Control Circuit for Reliable SOC Configuration Delivery
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
System on a chip (SOC) integrated circuits face challenges in reliably delivering configuration messages to less frequently addressed network components, such as network switches and interfaces, without occupying valuable space that could be used for more frequently accessed components, and existing solutions like end-to-end credit logic or sideband connections are inefficient due to their infrequent use.
Innovation Solution
Incorporating a PIO message control circuit that buffers and delays messages to ensure delivery to network components during specific modes like boot cycles or debugging, using existing network pathways to carry messages without the need for additional credit logic or sideband connections, thereby optimizing space usage and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If end-to-end credit logic or sideband connections are used to ensure reliable message delivery to network components, then message delivery reliability is improved, but device complexity and space occupation increase
Solution Approach 1:
The patent extracts the message buffering function from the network components and places it in a dedicated PIO message control circuit. This separates the configuration message handling from the data path operations, allowing reliable delivery without requiring complex credit logic in the network switches or sideband connections, thus reducing overall device complexity while maintaining reliability
Solution Approach 2:
The PIO message control circuit acts as an intermediary between the PIO interface and network components. It buffers configuration messages and manages their delivery timing, serving as a mediator that ensures reliable message delivery without requiring the network components themselves to implement complex reliability mechanisms
2Reliability
If dedicated pathways or additional logic are allocated for configuration messages to network components, then message delivery reliability is improved, but available space for frequently accessed components decreases
Solution Approach 1:
The existing network pathways are made multi-functional by allowing them to carry both data traffic and configuration messages. The PIO message control circuit utilizes the same network infrastructure for both purposes, eliminating the need for dedicated pathways and preserving space for frequently accessed components while ensuring reliable configuration message delivery
Solution Approach 2:
The system uses its existing network pathways to serve the additional function of delivering configuration messages. Rather than requiring external dedicated resources, the network infrastructure serves itself by handling both data and configuration traffic, optimizing space usage while maintaining reliability
3Area of stationary object
If existing network pathways are used to carry configuration messages, then space usage is optimized, but message delivery reliability may be compromised due to shared pathway congestion
Solution Approach 1:
The PIO message control circuit performs preliminary actions by buffering configuration messages before they are sent over the network pathways. This advance preparation allows the messages to be delivered reliably even when the pathways are shared, as the control circuit can manage timing and ensure proper delivery without requiring dedicated pathways
Data Source
AI summary
In an embodiment, a system on a chip (SOC) comprises a semiconductor die on which circuitry is formed, wherein the circuitry comprises a memory controller circuit and a plurality of networks formed from a plurality of individual network component circuits. The memory controller includes a PIO message control circuit that is configured to receive PIO messages addressed to individual network component circuits and determine whether to send the PIO messages to the individual network component circuits based on determine whether previous PIO messages are pending for the individual network component circuits. The PIO message control circuit is configured to delay a first PIO message at the PIO message control circuit in response to determining that previous PIO message is pending for the addressee of the first PIO message.