Pipe Gate Transistor Channel Segmentation for 3D Memory
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Solution Overview
Problem
The manufacturing of three-dimensional nonvolatile memory devices is hindered by the difficulty in producing reliable pipe transistors, as the channel layer can be cut off or threshold voltage control is inadequate, affecting the operational reliability of the memory device.
Innovation Solution
A semiconductor device with a pipe gate, word lines, first channel layers passing through the word lines, and a second channel layer with higher impurity concentration to connect the first channel layers, along with a method involving trench formation, sacrificial layer removal, and impurity implantation to enhance the connectivity and reliability of the pipe transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the pipe transistor is located below the stacked drain-side memory cells and source-side memory cells, then the three-dimensional structure is achieved, but the channel layer may be cut off or threshold voltage control becomes inadequate
Solution Approach 1:
The channel layer is segmented into two distinct parts: a first channel layer extending vertically through the word lines, and a second channel layer extending horizontally in the pipe gate. This segmentation allows each channel layer to be independently formed and controlled, preventing the channel layer from being cut off while maintaining the three-dimensional structure.
Solution Approach 2:
The second channel layer is doped with impurities at a higher concentration than the first channel layer, creating local quality differences. This localized impurity concentration control enables appropriate threshold voltage control for the pipe transistor while maintaining the overall three-dimensional architecture.
2Manufacturing precision
If the second channel layer has higher impurity concentration, then threshold voltage control is improved, but manufacturing complexity increases
Solution Approach 1:
The first channel layer is formed first, followed by the formation of the second channel layer with impurity doping. This preliminary action sequence allows the manufacturing process to establish the vertical channel structure before adding the horizontal channel layer with controlled impurity concentration, thereby achieving precise threshold voltage control through a systematic manufacturing approach.
Solution Approach 2:
The impurity concentration parameter is changed between the two channel layers, with the second channel layer having a higher impurity concentration than the first. This parameter change enables differentiated electrical characteristics and appropriate threshold voltage control for the pipe transistor while using standard semiconductor manufacturing techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the operational reliability of the semiconductor device by ensuring proper connectivity and threshold voltage control, maintaining the pipe transistor in a turned-on state and preventing agglomeration during manufacturing.
Implementation Method 1
a second channel layer formed in the pipe gate to connect the first channel layers and having a higher impurity concentration than the first channel layers
Implementation Method 2
implanting impurities into the second channel layer via the slit
Data Source
AI summary
A semiconductor device includes a pipe gate, word lines stacked on the pipe gate, first channel layers configured to pass through the word lines, and a second channel layer formed in the pipe gate to connect the first channel layers and having a higher impurity concentration than the first channel layers.