Pipe Gate Nonvolatile Memory Device Slit Etching Protection

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Solution Overview

Problem

In conventional nonvolatile memory devices, the increase in the number of cell stack layers complicates the slit etching process, leading to potential damage of the pipe gate and reduced current supply when a cell is in the 'on' state, as the gap between the control gate electrode and the pipe gate increases.

Innovation Solution

A nonvolatile memory device is designed with a pipe insulation layer and sacrificial layers to form a pipe channel hole, allowing for the creation of columnar cell channels and a pipe channel that surrounds the inner sidewalls and bottom of the pipe channel hole, preventing damage during slit etching and maintaining current supply by using a passivation layer and additional pipe gates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of cell stack layers is increased to improve cell density, then storage capacity is improved, but the slit etching process becomes more complex and the pipe gate is more likely to be damaged

Engineering Contradiction:
Improvecell densityVSAvoidpipe gate integrity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

A passivation layer is formed on the pipe gate before the slit etching process to preemptively protect it from damage. This preliminary protective action ensures that even as cell stack layers increase, the pipe gate remains intact throughout the subsequent etching operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The passivation layer acts as a cushioning barrier that absorbs or mitigates the harmful effects of the slit etching process on the pipe gate. This beforehand cushioning prevents direct contact between the etchant and the pipe gate, reducing damage risk regardless of the number of cell layers.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If a passivation layer is formed on the pipe gate to prevent damage during etching, then pipe gate protection is improved, but the gap between the control gate electrode and pipe gate increases, reducing current supply

Engineering Contradiction:
Improvepipe gate protectionVSAvoidcurrent supply
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The passivation layer is selectively removed from specific regions where current flow is needed, while maintaining it in other areas for protection. This local quality variation ensures that the pipe gate is protected where needed but remains electrically connected where current supply is required.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The pipe channel acts as an intermediary structure that maintains electrical connection between the control gate electrode and the pipe gate, even when the passivation layer is present. This intermediary pathway ensures current can flow through the protected structure without being blocked by the passivation layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If the number of cell stack layers is increased, then storage capacity is improved, but the slit etching process becomes more difficult to apply

Engineering Contradiction:
Improvestorage capacityVSAvoidslit etching processability
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The passivation layer is formed on the pipe gate before the slit etching process to preemptively protect it from damage. This preliminary protective action ensures that even as cell stack layers increase, the pipe gate remains intact throughout the subsequent etching operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9362301B2Method for fabricating pipe gate nonvolatile memory device
Publication Date: 2016.06.07 SK HYNIX INC
  • US9362301B2 patent drawing
  • US9362301B2 patent drawing
  • US9362301B2 patent drawing

AI summary

A nonvolatile memory device includes a pipe insulation layer having a pipe channel hole, a pipe gate disposed over the pipe insulation layer, a pair of cell strings each having a columnar cell channel, and a pipe channel coupling the columnar cell channels and surrounding inner sidewalls and a bottom of the pipe channel hole.