Pipe Latch Control Circuit Dynamic Read Signal Selection

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Solution Overview

Problem

The existing pipe latch control circuits in semiconductor integrated circuits face challenges in balancing the number of pipe latches to achieve high-speed operation without compromising data output reliability, as increasing pipe latches lengthens waiting time and area, while decreasing them undermines timing margins.

Innovation Solution

A pipe latch control circuit that includes a read command control unit capable of selecting a signal or its delayed version based on an internal clock to generate a read signal, optimizing the CAS latency and data output timing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of pipe latches is increased, then data output reliability is improved, but waiting time and area are lengthened

Engineering Contradiction:
Improvedata output reliabilityVSAvoidwaiting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements dynamic control of pipe latch operation by introducing a read command control unit that selectively activates pipe latches based on real-time timing conditions. The system transitions from static fixed-number pipe latch configuration to dynamic conditional activation, allowing the memory to adjust which pipe latches are active based on the current read operation timing requirements, thereby reducing unnecessary waiting time while maintaining reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of pipe latches by introducing selective activation control. Instead of all pipe latches being actively waiting simultaneously, the system changes the state of pipe latches based on timing conditions - activating only those needed for current read operations. This parameter change in pipe latch activation state reduces the collective waiting time across the system while maintaining data output reliability through proper sequencing.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the number of pipe latches is increased, then data output reliability is improved, but area is broadened

Engineering Contradiction:
Improvedata output reliabilityVSAvoidarea
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies dynamic control to reduce the effective area utilization. By making pipe latch activation dynamic rather than static, the system can activate only the necessary number of pipe latches for each read operation, reducing the simultaneous area requirement. This dynamic state management allows the same reliability to be achieved with fewer active pipe latch units at any given time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements partial action by activating only the necessary pipe latches for current operations rather than all pipe latches simultaneously. The read command control unit determines the minimum required pipe latch activation to ensure data output reliability, avoiding excessive activation that would broaden the effective area. This partial activation approach maintains reliability while reducing area utilization.

Inventive Principle:
Principle #16Partial or excessive action

3Loss of time

If the number of pipe latches is decreased, then waiting time is shortened, but timing margin is reduced

Engineering Contradiction:
Improvewaiting timeVSAvoidtiming margin
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent introduces feedback control through the read command control unit that monitors timing conditions and adjusts pipe latch activation accordingly. The system uses feedback from the current read operation timing to determine which pipe latches should be activated, ensuring sufficient timing margin is maintained while minimizing waiting time. This feedback mechanism allows the system to adapt to varying timing requirements and maintain reliability with reduced pipe latch activation.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent makes pipe latch activation dynamic based on real-time timing conditions. The read command control unit dynamically determines which pipe latches to activate based on the current read operation's timing requirements, allowing the system to optimize the balance between waiting time and timing margin for each specific operation rather than using a fixed configuration.

Inventive Principle:
Principle #15Dynamics

4Area of stationary object

If the number of pipe latches is decreased, then area is reduced, but timing margin is insufficient

Engineering Contradiction:
ImproveareaVSAvoidtiming margin
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies dynamic control to manage the trade-off between area and timing margin. By making pipe latch activation dynamic rather than static, the system can reduce the effective area used while maintaining sufficient timing margin through intelligent activation timing. The read command control unit ensures that pipe latches are activated at optimal moments to preserve timing margins even with reduced area utilization.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements preliminary action by pre-positioning pipe latches in ready state and using the read command control unit to determine the optimal activation timing. This preliminary preparation allows the system to reduce the number of simultaneously active pipe latches (reducing area) while maintaining timing margin through precise control of when pipe latches become active in the data output sequence.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8873306B2Pipe latch control circuit and semiconductor integrated circuit using the same
Publication Date: 2014.10.28 SK HYNIX INC
  • US8873306B2 patent drawing
  • US8873306B2 patent drawing
  • US8873306B2 patent drawing

AI summary

A pipe latch control circuit and a semiconductor integrated circuit using the same are provided. The pipe latch control circuit includes a read command control unit that receives a first signal and generates a read signal in response to a control signal. In the pipe latch control circuit, the read command control unit selects, in response to the control signal, the first signal or selects a second signal obtained by delaying the first signal according to an internal clock, and generates the selected first or second signal as the read signal.