PIPE5 to PIPE4 Converter for PCIe Compatibility

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Solution Overview

Problem

The incompatibility between PIPE4 and PIPE5 specifications in PCIe systems creates challenges for simulation and validation, as PIPE4 and PIPE5 are not backward compatible, making it difficult to perform tests and device development efficiently.

Innovation Solution

A converter system is introduced that includes a physical interface for the PCIe PIPE5 controller with MAC registers and a PIPE4 device, using a message bus interface to find and communicate with target PHY and MAC registers, enabling compatibility between PIPE5 and PIPE4 devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If PIPE5 controller is used, then data transfer speed and performance are improved, but compatibility with existing PIPE4 devices is lost

Engineering Contradiction:
Improvedata transfer speedVSAvoidcompatibility with PIPE4 devices
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

A converter device is introduced as an intermediary component between the PIPE5 controller and PIPE4 devices. The converter includes a first interface that communicates with the PIPE5 controller through a message bus interface and a second interface that communicates with PIPE4 devices through a PCIe link. This mediator translates messages between the two incompatible interfaces, allowing PIPE5 controllers to work with legacy PIPE4 devices without sacrificing the performance benefits of PIPE5.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If PIPE4 devices are used for testing, then backward compatibility and ease of testing are maintained, but validation of PIPE5 controllers is limited

Engineering Contradiction:
Improveease of testingVSAvoidvalidation accuracy for PIPE5
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The converter enables PIPE4 test devices to validate PIPE5 controllers by acting as a translation layer. The first interface maps PIPE5 controller operations to PIPE4 device operations, while the second interface communicates with the PIPE4 test device. This allows comprehensive validation of PIPE5 controllers using familiar PIPE4 test equipment, maintaining ease of testing while ensuring reliable PIPE5 validation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The converter performs parameter translation between different interface specifications. It maps message bus interface signals from PIPE5 to link interface signals compatible with PIPE4, and vice versa. This parameter transformation allows the same physical test device to validate controllers across different PIPE versions, ensuring reliable validation while maintaining ease of testing.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If a converter is introduced, then compatibility between PIPE5 and PIPE4 is achieved, but system complexity increases

Engineering Contradiction:
Improvecompatibility between PIPE versionsVSAvoidsystem architecture complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The converter is designed as a segmented architecture with distinct functional modules: a first interface module for PIPE5 message bus communication, a second interface module for PIPE4 PCIe link communication, and internal translation logic. This segmentation allows each module to handle specific tasks independently, making the overall system easier to manage and maintain despite the added complexity of supporting multiple interfaces.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11755525B2System including PIPE5 to PIPE4 converter and method thereof
Publication Date: 2023.09.12 SK HYNIX INC
  • US11755525B2 patent drawing
  • US11755525B2 patent drawing
  • US11755525B2 patent drawing

AI summary

Embodiments of the present invention provide a PIPE5 to PIPE4 converter to provide compatibility between a PIPE5 controller and a PIPE4 test device. The converter includes a first interface coupled to the PIPE5 controller including MAC registers through a message bus interface, a second interface coupled to the PIPE4 device through a PCIe link and PHY registers. When a first message bus interface signal is received from the PIPE5 controller, the first interface finds a target PHY register based on the first message bus interface signal, and the second interface generates a first link interface signal associated with the target PHY register and outputs the first link interface signal to the PIPE4 device.