Pipeline ADC Dual-Mode Comparator Input for Accuracy-Power Tradeoff
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Solution Overview
Problem
Analog-to-digital converters face a trade-off between enhancing conversion accuracy and reducing power consumption, with existing pipeline-type converters struggling to optimize both simultaneously.
Innovation Solution
The proposed analog-to-digital converter employs a dual-mode operation, utilizing both capacitance-input and gate-input types, where the analog signal is inputted via a capacitor in one mode and without a capacitor in another, allowing for adjustable sampling timing and reduced amplifier capacity, thereby optimizing conversion accuracy and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the conversion accuracy is enhanced by using traditional pipeline-type A-D converters with multiple comparators, then the conversion precision improves, but the power consumption increases
Solution Approach 1:
The patent applies dynamics by making the capacitor connection dynamic rather than static. The capacitor is selectively connected to the comparator input only during specific conversion stages when high precision is required, and disconnected during other stages. This dynamic switching allows the system to achieve high conversion accuracy when needed while minimizing power consumption during stages where full precision is not required, thus resolving the trade-off between accuracy and power consumption.
Solution Approach 2:
The patent changes the parameter of capacitor connection state (connected vs. disconnected) based on the conversion stage requirements. By controlling whether the capacitor is connected to the comparator input or not, the system can adjust its operational mode to match the precision requirements of different conversion stages, thereby optimizing the balance between conversion accuracy and power consumption across the entire conversion process.
2Measurement precision
If multiple comparators are used in each sub-A-D converter stage, then the conversion accuracy improves, but the device complexity increases
Solution Approach 1:
The patent extracts the capacitor from the continuous connection and makes it selectively connectable only when needed. By taking out the capacitor from permanent connection and implementing selective connection control, the system reduces the active circuit complexity during conversion stages where full precision is not required, while maintaining high conversion accuracy when the capacitor is connected during critical conversion stages.
3Measurement precision
If the capacitor is continuously connected to the comparator input, then the conversion accuracy is maintained, but the power consumption increases
Solution Approach 1:
The patent implements periodic action by connecting the capacitor to the comparator input only during specific periods or stages of the conversion process, rather than continuously. The capacitor is connected during conversion stages where high precision is required and disconnected during other stages, creating a periodic connection pattern that maintains conversion accuracy when needed while reducing power consumption during disconnected periods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This dual-mode operation enhances conversion accuracy while minimizing power consumption, allowing the converter to effectively balance both demands, reducing circuit scale and improving overall performance.
Implementation Method 1
an analog signal is inputted, via a capacitor, to a comparator included in the analog-to-digital converter
Data Source
AI summary
An A-D converter includes a first amplifier circuit, an A-D converter circuit, a D-A converter circuit, a subtraction circuit, a second amplifier circuit, a timing control circuit, a type control unit, an output unit. The type control unit sets the type of the A-D converter circuit at the time of conversion to the higher 4 bits, to a type in which either one of an analog signal or a reference voltage is inputted selectively to a comparator via a capacitor. The type control unit performs a control so that the type of the A-D converter circuit at the time of conversion to values of the higher 5th to 7th bits and the higher 8th to 10th bits from the most significant bit, to a type in which an analog signal and a reference voltage are inputted fixedly to a comparator without involving a capacitor.