Pipeline ADC Linearization for Radiation-Tolerant High SFDR
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Solution Overview
Problem
Current analog-to-digital converters (ADCs) face challenges in capturing broad ranges of plasma wave signals in high radiation environments, particularly in achieving high spurious-free dynamic range (SFDR) and maintaining fidelity while sampling at megahertz rates with minimal power consumption and circuit complexity.
Innovation Solution
A radiation-hardened ADC with a pipeline architecture and self-calibration technique that includes additional sub-ADC transition levels and calibration modules to reduce discontinuity heights, combined with radiation-hardness-by-design features like enclosed terminal layouts and self-resetting circuitry, ensures high fidelity and robust operation in harsh conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ADC architecture is used, then circuit complexity is reduced, but spurious-free dynamic range (SFDR) cannot exceed 80 dB
Solution Approach 1:
The ADC is divided into multiple pipeline stages, each handling a portion of the conversion process. This segmentation allows complex calibration functions to be distributed across stages, achieving >80 dB SFDR through coordinated operation of multiple simpler modules rather than a single complex circuit.
Solution Approach 2:
Calibration is performed in advance during idle periods between signal conversions. The calibration modules pre-adjust offset and gain parameters, storing correction values for later use during normal operation. This preliminary calibration action enables high SFDR performance without adding complexity to the signal conversion path.
2Productivity
If sampling rate is increased to capture broad bandwidth signals, then measurement capability is improved, but power consumption increases
Solution Approach 1:
The ADC employs periodic calibration cycles interspersed with signal conversion operations. During calibration phases, correction parameters are updated; during conversion phases, these parameters are applied. This periodic alternation allows the system to maintain high sampling rates for broad bandwidth coverage while consuming less power than continuous high-rate conversion would require.
Solution Approach 2:
The system dynamically adjusts operational parameters such as calibration frequency and conversion resolution based on signal characteristics and radiation conditions. By changing parameters adaptively rather than operating at fixed high settings, the ADC achieves high sampling rates when needed while reducing power consumption during less demanding operations.
3Reliability
If radiation hardness is enhanced through design, then reliability in high radiation environments is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The ADC incorporates self-calibration and self-correction capabilities that automatically compensate for radiation-induced drift in offset and gain parameters. The calibration modules continuously monitor and adjust parameters without external intervention, enabling the device to maintain reliability in high radiation environments through self-service rather than requiring complex external correction systems.
Solution Approach 2:
Calibration feedback loops measure actual converter performance and feed correction information back to adjustment elements. This feedback mechanism automatically compensates for radiation effects by detecting drift and applying corrective parameters, improving reliability without requiring overly complex manufacturing processes.
4Measurement precision
If calibration modules are added to improve linearity, then spurious-free dynamic range increases, but circuit complexity and power consumption increase
Solution Approach 1:
Calibration functions are merged with the existing pipeline ADC structure rather than being added as separate external modules. Calibration operations utilize the same hardware resources (switches, capacitors, amplifiers) during idle periods, combining measurement and correction functions within the existing circuit framework to minimize additional complexity.
Solution Approach 2:
The ADC hardware components serve multiple functions: signal conversion during operation and calibration reference generation during idle periods. The same switches, capacitors, and amplifiers used for normal conversion are repurposed for calibration measurements, making the circuit universal and reducing the need for dedicated calibration hardware.
Data Source
AI summary
Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-μm CMOS technology (1 μm=12−6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).