Pipeline ADC Multiplying Circuit Without Op-Amps or Frequency Compensation
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Solution Overview
Problem
Conventional pipeline ADCs face issues of high power consumption and the need for frequency compensation due to the use of operational amplifiers and closed-loop multiplying circuits, which increase the area and power requirements.
Innovation Solution
The proposed solution involves a pipeline ADC operation stage with a multiplying circuit that utilizes a voltage conversion circuit, source followers, and current sources to generate output signals, eliminating the need for operational amplifiers and closed loops, thereby reducing power consumption and eliminating the need for frequency compensation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If an operational amplifier is used in the multiplying circuit, then signal amplification is achieved, but power consumption increases and area increases
Solution Approach 1:
The patent extracts and removes the operational amplifier from the multiplying circuit, replacing it with a simplified architecture using only transistors, capacitors, and switches. This eliminates the high power consumption associated with operational amplifiers while maintaining the signal amplification function through alternative circuit mechanisms.
Solution Approach 2:
The patent replaces the expensive and power-hungry operational amplifier with simpler, lower-cost transistor-based circuit elements that consume significantly less power. The design uses basic semiconductor components instead of complex operational amplifier structures.
2Power
If an operational amplifier is used in the multiplying circuit, then signal amplification is achieved, but the area of the circuit increases
Solution Approach 1:
The patent removes the operational amplifier from the circuit, which occupies significant area, and replaces it with a compact arrangement of transistors, capacitors, and switches. This extraction reduces the overall circuit footprint while preserving the amplification function.
3Power
If a closed loop multiplying circuit is used, then signal amplification is achieved, but frequency compensation is required which increases power consumption
Solution Approach 1:
The patent extracts the closed-loop feedback mechanism from the multiplying circuit, transforming it into an open-loop or feedforward architecture. This eliminates the need for frequency compensation circuits and their associated power consumption, while maintaining signal amplification through direct transistor control mechanisms.
4Power
If the amplification factor is increased, then the multiplying capability is improved, but the area of the operational amplifier and power consumption increase
Solution Approach 1:
The patent removes the operational amplifier entirely, replacing it with a transistor-based multiplying circuit that achieves high multiplication factors without the proportional increase in power consumption that would occur with scaled operational amplifiers. The circuit uses capacitor ratios and transistor gain to achieve high multiplication efficiently.
Data Source
AI summary
A multiplying circuit of an operation stage of a pipeline analog-to-digital converter (ADC) has first and second output terminals and is configured to generate first and second output signals according to first and second input signals. The multiplying circuit includes a voltage conversion circuit, first and second transistors, and first and second current sources. The voltage conversion circuit is configured to generate a first intermediate voltage and a second intermediate voltage according to the first input signal and the second input signal. The first transistor has a first terminal coupled to the first output terminal, a second terminal coupled to a power supply voltage, and a first control terminal receiving the first intermediate voltage. The second transistor has a third terminal coupled to the second output terminal, a fourth terminal coupled to the power supply voltage, and a second control terminal receiving the second intermediate voltage.