Pipeline ADC Stage Segmentation for Lower-Power High-Speed Conversion
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Solution Overview
Problem
Pipeline analog to digital converters face increased power consumption and circuit area due to the need for higher current circuits as clock speed increases, limiting the operating interval for each conversion.
Innovation Solution
The design includes multiple converter circuitries where one circuitry converts the input signal directly to a digital code, allowing it to enter an amplifying phase early and generate a residue signal, while another circuitry quantizes the signal based on the digital code, extending the amplifying phase and reducing power consumption and circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock speed is increased to improve conversion speed, then the productivity is improved, but the power consumption and circuit area are increased
Solution Approach 1:
The converter is divided into multiple converter circuitries (first converter circuitry, second converter circuitry, etc.), each handling different stages of the conversion process. This segmentation allows parallel processing where later stages can begin their amplifying phase earlier while earlier stages are still completing their conversions, thereby reducing the overall operating interval and power consumption while maintaining high conversion speed.
2Productivity
If the operating interval is shortened to increase clock speed, then the productivity is improved, but the amplifying phase duration is reduced requiring higher current
Solution Approach 1:
The second converter circuitry performs preliminary action by starting its amplifying phase earlier, before the first converter circuitry completes its conversion. The second circuitry quantizes the input signal based on the first digital code as soon as it becomes available, generating its residue signal in advance. This preliminary action extends the effective amplifying phase duration without requiring higher current.
3Productivity
If higher current is used in residue amplifiers to process conversion results in short periods, then the productivity is improved, but the power consumption and circuit area are increased
Solution Approach 1:
The multiple converter circuitries operate in a continuous pipeline manner where each stage processes signals without idle waiting time. While the first converter circuitry completes its conversion, the second converter circuitry is already in its amplifying phase, and subsequent circuitries are preparing their input signals. This continuous operation maintains high productivity without requiring peak current bursts, thereby reducing circuit area requirements.
Data Source
AI summary
A pipeline analog to digital converter includes converter circuitries. The converter circuitries are configured to sequentially convert an input signal to be digital codes. The converter circuitries includes a first converter circuitry and a second converter circuitry. The first converter circuitry is configured to a convert a first signal to be a first digital code in the digital codes, and generate a first residue signal according to the first signal and the first digital code. The second converter circuitry is configured to receive the first signal and the first digital code to quantize the first signal according to the first digital code, in order to generate a second digital code in the digital codes, and generate a second residue signal according to the first residue signal and the second digital code.