Pipeline Error Recovery via Soft and Hard Flush Procedures
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Solution Overview
Problem
Existing data processing apparatuses face challenges in reliably recovering from errors, particularly when errors occur at the limits of reliable operation, leading to potential deadlocks that conventional error recovery mechanisms cannot resolve.
Innovation Solution
A data processing apparatus with an execution pipeline, error detection unit, exception storage unit, and error recovery unit that initiates a soft flush procedure if an error is detected, and if that fails, a hard flush procedure is triggered after a predetermined time period to reset the pipeline and ensure recovery, allowing operation in unreliable regimes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error recovery mechanisms are used, then normal operation can be maintained under typical conditions, but the system cannot successfully recover when errors occur at the limits of reliable operation, leading to deadlocks
Solution Approach 1:
The patent applies preliminary action by maintaining an exception storage unit that pre-stores status information for all instructions in the execution pipeline before errors occur. This pre-prepared storage structure enables immediate error recovery without complex real-time decision-making, allowing the system to successfully recover from errors even at operational limits where conventional mechanisms fail.
2Productivity
If the system operates at the limits of reliable operation (high clock speed, low voltage, etc.), then productivity is improved, but errors become more frequent and conventional recovery mechanisms fail
Solution Approach 1:
The patent implements beforehand cushioning by creating a buffer mechanism through the exception storage unit that captures and preserves instruction status information before errors can propagate. This cushioning effect allows the system to operate at high clock speeds and unreliable regimes while maintaining the ability to recover, as the pre-stored status information acts as a safety buffer against failures.
3Reliability
If error detection is implemented by sampling signals, then errors can be detected, but false detections may occur when signals change during the sampling period
Solution Approach 1:
The patent uses an intermediary approach by introducing the exception storage unit as a mediator between the execution pipeline and error detection mechanisms. Rather than directly sampling and interpreting signals (which causes false detections), the system stores instruction status information in the exception storage unit, providing a stable intermediate representation that eliminates false error detections while maintaining detection capability.
Data Source
AI summary
A data processing apparatus executes instructions in a sequence of pipelined execution stages. An error detection unit twice samples a signal associated with execution of an instruction and generates an error signal if the samples differ. An exception storage unit maintains an age-ordered list of entries corresponding to instructions issued to the execution pipeline and can mark an entry to show if the error signal has been generated in association with that instruction. A timer unit is responsive to generation of the error signal to initiate timing of a predetermined time period. An error recovery unit initiates a soft pipeline flush procedure if an oldest pending entry in the list has said error marker stored in association therewith and initiates a hard pipeline flush procedure if said predetermined time period elapses, said hard flush procedure comprising resetting said pipeline to a predetermined state.