Hardware Pipeline Pattern Detector for Malicious Code
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Solution Overview
Problem
The spread of unwanted computer code or information across interconnected computing devices poses challenges for detection, as existing solutions often delay data processing and require costly, power-hungry processors.
Innovation Solution
A pattern detection mechanism implemented in hardware within a processing pipeline, where a detector identifies patterns within data as it moves through the pipeline without delaying its progression, using lower-cost components and correlators to match patterns across multiple rows without the need for dedicated processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If dedicated processors are used for pattern detection, then detection accuracy is improved, but device cost and power consumption increase
Solution Approach 1:
The patent replaces dedicated processors with a hardware-based pipeline system that uses simple logic circuits and memory structures to perform pattern detection. This substitution of complex processing mechanics with simpler hardware mechanics achieves the same detection function with lower power consumption and cost.
Solution Approach 2:
The patent segments the pattern detection process into multiple pipeline stages, where each stage handles a specific aspect of detection. This segmentation allows parallel processing of different data portions simultaneously, maintaining high detection accuracy while using simple, low-power hardware components in each stage.
2Measurement precision
If dedicated processors are used for pattern detection, then detection accuracy is improved, but device complexity increases
Solution Approach 1:
The patent replaces complex dedicated processors with simpler hardware structures including logic circuits, memory elements, and pipeline registers. These simpler components work together in a coordinated pipeline to achieve pattern detection without requiring complex processing units.
Solution Approach 2:
The patent designs the pipeline stages to be multi-functional, where the same hardware structures can handle different pattern detection tasks by reconfiguring their operation. This universality reduces overall device complexity compared to having separate dedicated processors for each detection function.
3Measurement precision
If data is paused for pattern detection, then detection thoroughness is improved, but processing speed decreases
Solution Approach 1:
The patent performs preliminary pattern detection actions within each pipeline stage as data passes through, rather than pausing the entire data flow. Each stage prepares and processes its portion of the data in advance, enabling continuous throughput while maintaining thorough detection.
Solution Approach 2:
The patent maintains continuous data flow through the pipeline while pattern detection operations are performed concurrently in each stage. This continuity ensures that detection thoroughness is not compromised while processing speed is maximized through uninterrupted data movement.
4Ease of manufacture
If simple hardware components are used, then device cost decreases, but detection capability is reduced
Solution Approach 1:
The patent segments the detection capability across multiple pipeline stages, where each stage uses simple hardware components but contributes to the overall detection capability. The cumulative effect of multiple simple stages achieves the detection capability of a single complex processor while maintaining lower cost.
Solution Approach 2:
The patent merges the functionality of multiple simple hardware stages into a unified detection system. By combining the detection capabilities of several simple components working in sequence and parallel, the system achieves high detection capability without requiring any single expensive component.
Data Source
AI summary
Data is moved through a pipeline as processing of the data unrelated to detection of pattern is performed. The detector detects the pattern within the data at a predetermined location or based on a predetermined reference as the data is moved through the pipeline, in parallel with the processing of the data as the data is moved through the pipeline. The detector detects the pattern within the data as the data is moved through the pipeline without delaying movement of the data into, through, and out of the pipeline.


