Pipeline Time-to-Digital Conversion Stage for High-Resolution Phase Sensing
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Solution Overview
Problem
Conventional high-resolution time-to-digital converters require multiple time difference amplifiers and time-to-digital converters, leading to increased circuit size and power consumption.
Innovation Solution
A time-to-digital conversion stage comprising a time-to-digital conversion circuit, a time difference amplifier circuit, a delay adjustment circuit, an output detection circuit, and a storage circuit, which amplifies and digitizes phase differences between input signals, allowing for multi-stage coupling to achieve high-resolution conversion with reduced circuit size and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional high-resolution time-to-digital converters use multiple time difference amplifiers and time-to-digital converters, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
The converter is divided into multiple stages, where each stage performs a portion of the phase difference measurement. The first stage performs coarse measurement with a first time-to-digital converter, and the second stage performs fine measurement with a second time-to-digital converter. This segmentation allows high resolution to be achieved without requiring a single large complex converter.
Solution Approach 2:
A time difference amplifier is introduced as an intermediary component between the phase difference input and the time-to-digital converters. This amplifier amplifies the phase difference by a predetermined amount, enabling the system to achieve high resolution with smaller, simpler converters rather than requiring one large high-resolution converter.
2Measurement precision
If conventional high-resolution time-to-digital converters use multiple time difference amplifiers and time-to-digital converters, then measurement precision is improved, but power consumption increases
Solution Approach 1:
The measurement function is segmented across multiple stages with different resolution requirements. The first stage handles coarse measurement with lower power consumption, while the second stage handles fine measurement. This segmentation reduces total power consumption compared to using a single high-resolution converter that would consume more power.
Solution Approach 2:
The time difference amplifier acts as a mediator that pre-processes the phase difference signal, amplifying it before digitization. This allows subsequent time-to-digital converters to operate at lower power while still achieving high overall resolution, reducing total system power consumption.
3Device complexity
If a single time-to-digital converter is used without phase difference amplification, then device complexity is reduced, but measurement precision deteriorates
Solution Approach 1:
A time difference amplifier is inserted as an intermediary to amplify the phase difference before it enters the time-to-digital converter. This allows a simple, small converter to achieve high measurement precision that would otherwise require a large complex converter, thus maintaining low device complexity while improving measurement precision.
Solution Approach 2:
The system changes the parameter being measured by amplifying the phase difference signal before digitization. Instead of directly converting a small phase difference with a high-resolution converter, the system amplifies the phase difference and uses a lower-resolution converter, achieving the same effective precision with simpler hardware.
Data Source
AI summary
In a time-to-digital conversion stage, a time-to-digital conversion circuit outputs an n-bit digital signal, which represents an integer value ranging from −(2n-1−1) to +(2n-1−1), based on a phase difference between a first and a second signals input thereto; a time difference amplifier circuit amplifies the phase difference between the first and the second signals 2n-1 times, and outputs two signals having an amplified phase difference therebetween; a delay adjustment circuit adds a phase difference dependent on the digital signal to the two signals output from the time difference amplifier circuit, and outputs another two signals; an output detection circuit detects that the delay adjustment circuit has output the another two signals, and outputs a detection signal; and a storage circuit latches the digital signal in synchronism with the detection signal. Multi-stage coupling of the time-to-digital conversion stages forms a pipeline time-to-digital converter.