Processor Pipeline Virtualization for Parallel Processing Bottlenecks

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Solution Overview

Problem

Existing processor architectures face challenges in efficiently utilizing processing capacity, particularly when executing programs across multiple cores, leading to underutilization of resources due to the limitations of current parallel processing techniques.

Innovation Solution

A data processing system with a processor comprising multiple cores, each having a first and second processing pipeline with different architectures, managed by a framework that presents these pipelines as separate cores or processors, allowing for more efficient resource allocation and utilization through the OpenCL framework.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processing pipelines with different architectures are provided within each core, then processing capability and parallel processing performance are improved, but device complexity increases

Engineering Contradiction:
Improveparallel processing capacityVSAvoidprocessor architecture complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The processor is segmented into multiple cores, each containing multiple processing pipelines with different architectures (e.g., scalar and SIMD pipelines). This segmentation allows each pipeline to be independently managed and scheduled, enabling diverse processing tasks to be executed simultaneously without overwhelming the entire system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each processing core is designed with multi-functionality by incorporating multiple types of processing pipelines (scalar, SIMD, etc.) within a single core. This universal design allows the core to handle various processing workloads efficiently, from scalar operations to vector operations, thereby improving overall productivity while managing complexity through functional integration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If processing pipelines are presented as separate cores to the framework, then resource utilization efficiency is improved, but the interface complexity increases

Engineering Contradiction:
Improveresource utilization efficiencyVSAvoidinterface complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

An intermediary interface layer is introduced between the processing pipelines and the programming framework. This interface presents each processing pipeline as a separate core, simplifying the framework's interaction with the complex multi-pipeline architecture. The intermediary handles the mapping and translation between framework requests and actual pipeline execution, thereby improving resource utilization efficiency without significantly increasing interface complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If different types of processing elements are provided in each core, then processing versatility is improved, but ease of operation decreases

Engineering Contradiction:
Improveprocessing capabilityVSAvoidprogramming difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

Each processing core is designed with multi-functionality by incorporating multiple types of processing pipelines (scalar, SIMD, etc.) within a single core. This universal design allows the core to handle various processing workloads efficiently, from scalar operations to vector operations, thereby improving overall productivity while managing complexity through functional integration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The processor is segmented into multiple cores, each containing multiple processing pipelines with different architectures (e.g., scalar and SIMD pipelines). This segmentation allows each pipeline to be independently managed and scheduled, enabling diverse processing tasks to be executed simultaneously without overwhelming the entire system complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10146736B2Presenting pipelines of multicore processors as separate processor cores to a programming framework
Publication Date: 2018.12.04 IMAGINATION TECH LTD
  • US10146736B2 patent drawing
  • US10146736B2 patent drawing
  • US10146736B2 patent drawing

AI summary

A data processing system comprising: a processor comprising a plurality of cores, each core comprising a first processing pipeline and a second processing pipeline, the second processing pipeline having a different architecture to the first processing pipeline; a framework configured to manage the processing resources of the data processing system including the processor; and an interface configured to present to the framework each of the processing pipelines as a core.