Pipelined ADC Correction for Vertical Shift and Aliasing
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Solution Overview
Problem
Pipelined A/D converters experience vertical shift errors in input/output characteristics, leading to aliasing and wastage of output range due to clipping, which hampers effective utilization of the converter's output range.
Innovation Solution
A pipelined A/D converter configuration that includes a correction value adding unit, a correction value calculating unit, and a control unit to adjust and correct the input/output characteristics by calculating and applying correction values based on the median between arbitrary points, thereby preventing aliasing and optimizing output range usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If correction techniques are applied to improve A/D converter characteristics, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating correction values for vertical shift errors and storing them in a correction value storage unit. During normal operation, these pre-computed correction values are simply added to the output data, avoiding real-time complex calculations. This resolves the contradiction by preparing correction data in advance, improving measurement precision without adding operational complexity.
Solution Approach 2:
The patent introduces an intermediary correction value storage unit that holds pre-computed correction values. This intermediary component mediates between the complex correction calculation process and the simple output stage, allowing accurate correction to be applied through a simple addition operation. The intermediary storage unit decouples the complexity of correction calculations from the operational path, improving precision while maintaining device simplicity.
2Device complexity
If vertical shift errors are not corrected, then device complexity remains low, but loss of information occurs due to clipping and aliasing
Solution Approach 1:
The patent pre-calculates correction values for vertical shift errors and stores them before they cause information loss. By preparing these correction values in advance and applying them through simple addition, the system prevents clipping and aliasing without requiring complex real-time processing, thus avoiding information loss while maintaining device simplicity.
Solution Approach 2:
The patent implements a feedback mechanism where correction values are calculated based on the relationship between input and output data, then fed back to correct the output. This feedback loop continuously compensates for vertical shift errors, preventing information loss from clipping and aliasing while using a simple addition-based correction approach that doesn't significantly increase device complexity.
3Measurement precision
If correction operations are performed in real-time, then measurement precision is improved, but productivity decreases due to additional processing time
Solution Approach 1:
The patent performs correction value calculations in advance and stores them, so that during normal A/D conversion operations, only a simple addition of pre-computed correction values is needed. This preliminary preparation eliminates time-consuming real-time calculations, maintaining high conversion speed while achieving accurate correction of vertical shift errors.
Solution Approach 2:
The patent changes the operational parameter from real-time complex correction calculations to simple addition of pre-stored correction values. This parameter change in the correction method transforms a time-intensive operation into a rapid operation, maintaining measurement precision while significantly improving conversion speed and productivity.
Data Source
AI summary
Multiple stages sequentially convert respective input analog signals to partial digital data. Each stage includes: a partial A/D converter; a partial D/A converter; an adder that adds/subtracts the analog signal from the previous stage and an output from the partial D/A converter; and a gain amplifier that amplifies an output of the adder and supplies to the next stage. The pipelined A/D converter further includes: a correction value adding unit that adds a correction value to the output from the decoder unit; a correction value calculating unit that, based on the output from the correction value adding unit, calculates an error between the median of the output data and an ideal median at two points in the stage input/output characteristics, saves the calculated value as the correction value and supplies it to the correction value adding unit; and a control unit that controls the above units so as to perform the correction operation. Thereby, aliasing at decoding of the stage output is prevented, enabling an output range to be used effectively.