Pipelined ADC Background Calibration for Gain and Memory Errors
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Solution Overview
Problem
Pipelined analog-to-digital converters (ADCs) face issues with inter-stage amplifier gain errors and memory errors due to capacitor dielectric relaxation and incomplete resetting, leading to performance degradation and potential loss of information, especially during calibration, which can interrupt normal operation and require significant chip area and power.
Innovation Solution
An adaptive background calibration system for pipelined ADCs using a least mean squares (LMS) algorithm and adaptive digital filters to correct for circuit impairments, injecting a training signal to adjust tap weights and reduce errors, while avoiding amplitude clipping by dynamically managing the training signal based on input amplitude.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a training signal is injected for calibration, then ADC gain errors and memory errors are corrected, but the ADC input amplitude must be reduced which causes loss of information and performance degradation
Solution Approach 1:
The calibration system dynamically adjusts the training signal amplitude based on the current input signal amplitude. When the input signal amplitude is low, the training signal amplitude is increased to improve calibration accuracy. When the input signal amplitude is high, the training signal amplitude is reduced or disabled to avoid clipping and information loss. This dynamic adaptation resolves the contradiction by making the calibration process responsive to real-time signal conditions.
Solution Approach 2:
The system changes the amplitude parameter of the training signal based on the detected input signal characteristics. By monitoring the input signal amplitude and adjusting the training signal amplitude accordingly, the system optimizes the calibration process to prevent clipping while maintaining correction effectiveness, thus resolving the information loss issue.
2Measurement precision
If calibration is performed in the foreground, then ADC performance is improved, but normal ADC operation is interrupted
Solution Approach 1:
The calibration process is implemented as a background operation that continues during normal ADC conversion activities. The training signal is injected continuously or periodically without interrupting the main conversion pipeline, allowing both calibration and normal operation to proceed simultaneously. This resolves the contradiction by maintaining continuous useful action in both calibration and conversion functions.
Solution Approach 2:
The system uses an intermediary background calibration mode where the training signal and calibration logic operate in parallel with the main conversion path. The calibration updates are applied gradually in the background without blocking the primary ADC function, thus maintaining productivity while improving measurement precision over time.
3Measurement precision
If the size of the circuitry is increased to improve ADC performance, then conversion accuracy is enhanced, but significant chip area and power are required
Solution Approach 1:
The ADC system performs its own calibration using built-in background calibration logic and training signal generation. The calibration function is integrated into the existing ADC structure, allowing the device to self-correct gain errors and memory errors without requiring external calibration equipment or additional large calibration circuits. This self-service approach improves conversion accuracy while minimizing the additional chip area required.
Solution Approach 2:
The system uses digital signal processing techniques with adjustable parameters (such as filter coefficients and gain correction factors) to improve conversion accuracy. By optimizing these parameters through background calibration rather than increasing hardware complexity, the system achieves enhanced precision without proportionally increasing chip area and power consumption.
4Measurement precision
If the size of the circuitry is increased to improve ADC performance, then conversion accuracy is enhanced, but power consumption increases
Solution Approach 1:
The ADC incorporates integrated background calibration functionality that operates with minimal additional power consumption. The calibration logic reuses existing circuit resources and performs corrections using low-power digital signal processing, avoiding the need for high-power external calibration equipment or energy-intensive hardware enhancements. This self-service calibration improves conversion accuracy while maintaining efficient power usage.
Solution Approach 2:
The system replaces potential high-power analog calibration circuits with low-power digital signal processing techniques. By using digital filters, coefficient adjustments, and software-based correction algorithms, the system achieves improved conversion accuracy with significantly lower power consumption compared to traditional analog calibration approaches that would require additional high-power circuitry.
Data Source
AI summary
An electronic device is disclosed that includes an analog-to-digital converter circuit, an adaptive filter circuit coupled to the analog-to-digital converter circuit to correct one or more circuit impairments in the analog-to-digital converter circuit, a training signal generator circuit to generate training signals, and an amplitude detector circuit configured to suspend generation of the training signals and cause the adaptive filter circuit to suspend adaptation when the input signal is above a predetermined threshold.