Pipelined ADC Residual Voltage Circuit for Stable Common-Mode Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In pipelined analog-to-digital converters (ADCs), large fluctuations in the common mode voltage of residual voltages complicate amplifier design and lead to offset voltage changes.

Innovation Solution

A residual voltage generation circuit is introduced, featuring a common mode voltage ADC, a digital signal processing module, and a sub-DAC. This circuit stabilizes the common mode voltage of residual voltages around a set threshold, independent of the input signal, by generating switching control signals based on processed digital signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a conventional residual voltage generation circuit is used in a pipelined ADC, then the circuit structure is simple, but the common mode voltage of residual voltages fluctuates significantly with input signal changes, complicating amplifier design and causing offset voltage changes

Engineering Contradiction:
Improvecircuit structureVSAvoidcommon mode voltage stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The residual voltage generation circuit is divided into two independent parts: a first residual voltage generation circuit that generates common mode voltage based on a clock signal, and a second residual voltage generation circuit that generates differential voltage based on input signals. This segmentation allows the common mode voltage to be stabilized independently from the input signal variations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common mode voltage is generated in advance based on the clock signal before the input signal is processed. By preliminarily establishing the common mode voltage level independent of the input signal, the system avoids subsequent fluctuations and simplifies amplifier design requirements.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If the common mode voltage of residual voltages is allowed to vary with input signal, then the circuit operates simply, but the amplifier design becomes very difficult and offset voltage changes occur

Engineering Contradiction:
Improvecircuit operationVSAvoidamplifier design
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The common mode voltage generation function is extracted from the input signal processing path and placed in a separate first residual voltage generation circuit. This extraction removes the coupling between input signal variations and common mode voltage, thereby simplifying amplifier design while maintaining ease of operation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If switching control signals are generated based on digital signal from first ADC, then the residual voltage generation follows conventional approach, but the common mode voltage changes with input signal causing offset voltage changes

Engineering Contradiction:
Improveresidual voltage generation adaptabilityVSAvoidoffset voltage stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system uses dynamic switching control signals generated from the digital output of the first ADC to control the second residual voltage generation circuit. This dynamic control adapts the differential voltage generation to the input signal characteristics while the common mode voltage remains stable, maintaining reliability by preventing offset voltage changes.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250202495A1Pipelined Analog-to-digital Converter (ADC) and Residual Voltage Generation Circuit and Generation Method Thereof
Publication Date: 2025.06.19 JOULWATT TECH (SHENZHEN) CO LTD
  • US20250202495A1 patent drawing
  • US20250202495A1 patent drawing
  • US20250202495A1 patent drawing

AI summary

A pipelined analog-to-digital converter (ADC) and a residual voltage generation circuit and generation method thereof are provided. A common mode voltage ADC is configured to convert a common mode voltage of an input signal into a first digital signal; a digital signal processing module is configured to receive the first digital signal and a second digital signal obtained by rough conversion of the input signal by an ADC and output a third digital signal and a fourth digital signal based on the first digital signal and the second digital signal, respectively; a sub-digital-to-analog converter (DAC) is configured to receive the input signals and a switching control signal and output a residual voltage; and based on the third digital signal and the fourth digital signal, a common mode voltage of the residual voltage is approximately equal to a set threshold voltage.