Pipelined A/D Converter Dithering for Nonlinearity Correction

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Solution Overview

Problem

Conventional pipelined A/D converters suffer from non-linearity due to finite gain error and settling error of OP amplifiers and capacitor mismatch, affecting the quality of digital output signals.

Innovation Solution

The implementation of a pipelined A/D converter with a sample-and-hold amplifier, multiple stages of ADC units, delay elements, a digital logic correction circuit, and a compensation circuit, where a dither value is superimposed on the analog input signal to reduce non-linearity by correcting errors and removing the dither from the digital signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional pipelined A/D converter stages with OP amplifiers and capacitors are used, then the converter can process analog signals, but non-linearity occurs due to finite gain error, settling error, and capacitor mismatch

Engineering Contradiction:
Improvelinearity of digital output signalVSAvoidquality of digital output signal
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

A dither signal is introduced as an intermediary element between the analog input signal and the ADC conversion process. This dither signal acts as a mediator that randomizes the quantization error and interacts with the non-linearities in the pipelined stages, ultimately improving the linearity of the digital output when the dither is removed through digital subtraction

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the parameter of the input signal by superimposing a dither signal with specific characteristics (amplitude and frequency) onto the analog input signal. This parameter modification allows the system to operate in a regime where the non-linearities are averaged out or randomized, and the dither can be subsequently removed digitally to recover a linearized output

Inventive Principle:
Principle #35Parameter changes

2Speed

If multiple stages of ADC units are used in pipelined architecture, then conversion speed is improved, but error accumulation from each stage increases non-linearity

Engineering Contradiction:
Improvesignal conversion speedVSAvoidlinearity of digital output signal
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The dither signal provides a form of feedback mechanism where the same dither is added at the input and subtracted at the output. This feedback approach ensures that the dither's interaction with the non-linearities in each pipelined stage is compensated, allowing multiple stages to operate at high speed without accumulating non-linear errors

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The dither signal is pre-added to the analog input signal before it enters the pipelined ADC stages. This preliminary action prepares the signal in advance so that when it passes through multiple conversion stages, the non-linearities are already being randomized and controlled, preventing error accumulation across stages

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7602324B1A/D converter and method for converting analog signals into digital signals
Publication Date: 2009.10.13 HIMAX TECH LTD
  • US7602324B1 patent drawing
  • US7602324B1 patent drawing
  • US7602324B1 patent drawing

AI summary

A method for converting analog signals into digital signals includes the steps of: superimposing a dither value on an analog input signal; sampling the superimposition of the analog input signal with the dither value to obtain a sampling signal; converting the sampling signal into corresponding digital values; correcting offsets in the digital values to generate a digital signal; and removing the dither value from the digital signal. An analog-to-digital converter is also disclosed herein.