Pipelined ADC Encoder Logic for Incongruent Comparator Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional pipelined analog-to-digital converters experience operational issues due to logical incongruence in signal combinations from the ADC section, leading to short-circuiting of reference voltages and reduced yield, especially when ADC sections exhibit variations in characteristics during production.
Innovation Solution
Incorporating an encoder design in each converter stage that generates congruent signal combinations to prevent short-circuiting, even when the ADC section outputs logically incongruent signals, by using a combination of NAND gates, inverters, and an XOR gate to control the digital-to-analog converter section.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional encoder design is used in the converter stage, then the circuit structure is simple, but logical incongruence in signal combinations causes short-circuiting of reference voltages and operational failures
Solution Approach 1:
The encoder detects logical incongruence in signal combinations from the ADC section before they can cause short-circuiting of reference voltages. By preliminarily identifying invalid signal states (such as S1=H and S2=L combinations that would cause short-circuits), the encoder prevents harmful effects before they occur, thereby improving reliability without requiring complex additional protection circuits
Solution Approach 2:
The encoder acts as an intermediary between the ADC section and the DAC section. It processes the raw signals from the ADC, validates their logical congruence, and only passes valid combinations to control the DAC. This intermediary function filters out incongruent signals that would otherwise cause operational failures, improving system reliability while maintaining a relatively simple circuit structure
2Productivity
If ADC sections are manufactured with standard production processes, then manufacturing cost is low, but variations in characteristics lead to signal logical incongruence and reduced yield
Solution Approach 1:
The invention converts the harmful effect of ADC characteristic variations into a detectable signal condition. Instead of trying to prevent variations during manufacturing, the encoder monitors the output signals for logical incongruence that arises from these variations. By detecting and correcting the symptoms of manufacturing imprecision, the system maintains high production yield without requiring tighter manufacturing tolerances
Solution Approach 2:
The encoder provides self-correction functionality within the converter stage. When it detects logical incongruence in the ADC output signals, it automatically corrects the signal combinations to valid states before passing them to the DAC section. This self-service mechanism compensates for ADC characteristic variations without requiring external calibration or rejection of defective units, thereby improving production yield
Data Source
AI summary
In a pipelined analog-to-digital (AD) converter, if logically incongruent signals S1 and S2 are output from an AD converter section of a converter stage of the AD converter, a digital-to-analog converter (DAC) section is to be prevented from erroneously operating. When a logically incongruent combination of signals S1 and S2, such as S1=“H” and S2=“L”, is output from comparators that compare an input voltage VI to reference voltages +REF/4 and −REF/4, an encoder outputs a signal corresponding to a normal signal combination (S1=“L” and S2=“H”) to generate signals X, Y and Z that control switches of the DAC section. This eliminates the risk that the switches shall be turned on simultaneously, thus preventing the erroneous operation of the DAC section.