Pipelined ADC Reference Voltage Switching for Low-Noise Residue Generation

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Solution Overview

Problem

Pipelined analog-to-digital converters face differing and contradictory requirements for reference voltage generation during different phases of conversion, leading to stringent noise requirements that are not efficiently met by existing technologies.

Innovation Solution

A pipelined ADC with a reference-voltage generator circuit that operates in two modes, relaxing noise requirements during the first conversion phase by reducing power dissipation and bandwidth, allowing errors in the least significant bit to be corrected in subsequent stages, and tightening noise control during the second phase for accurate residue generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the reference voltage generator operates with high noise performance in both conversion phases, then accurate conversion is achieved, but power consumption increases unnecessarily during the first phase

Engineering Contradiction:
Improveconversion accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The reference voltage generator dynamically switches between two operational modes: a first mode during the first conversion phase with relaxed noise requirements and lower power consumption, and a second mode during the second conversion phase with stringent noise requirements and higher power consumption. This dynamic adaptation resolves the contradiction by matching the generator's performance characteristics to the actual requirements of each phase.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the noise performance parameter of the reference voltage generator based on the conversion phase. During the first phase, the generator operates with higher acceptable noise levels, while during the second phase, it switches to low-noise operation. This parameter change allows the system to achieve accurate conversion when needed while reducing power consumption when high precision is not required.

Inventive Principle:
Principle #35Parameter changes

2Speed

If the reference voltage generator maintains high bandwidth in both phases, then fast response is achieved, but noise power increases during the first conversion phase

Engineering Contradiction:
Improveresponse speedVSAvoidnoise power
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The reference voltage generator dynamically adjusts its bandwidth parameter based on the conversion phase. During the first conversion phase, the generator operates with reduced bandwidth, which lowers noise power while still meeting the relaxed speed requirements. During the second conversion phase, it switches to high bandwidth mode to ensure fast response for accurate residue generation. This dynamic adjustment resolves the contradiction between speed and noise power.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the pipelined ADC uses overlapping conversion ranges between stages, then conversion rate and resolution are improved, but noise requirements on the reference voltage generator become more stringent

Engineering Contradiction:
Improveconversion rateVSAvoidnoise requirements
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The conversion process is segmented into two distinct phases with different noise requirements. The first phase (digital conversion) has relaxed noise requirements, and the second phase (residue generation) has stringent noise requirements. By segmenting the conversion process and applying different reference voltage generator modes to each phase, the system achieves high conversion rate through overlapping ranges while managing noise requirements effectively.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10608658B2Pipelined analog-to-digital converter
Publication Date: 2020.03.31 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US10608658B2 patent drawing
  • US10608658B2 patent drawing
  • US10608658B2 patent drawing

AI summary

A pipelined ADC includes a first sub ADC and a second sub ADC. The second sub ADC is configured to receive, as an input, an analog residue generated by the first sub ADC. The first sub ADC is configured to operate in a first conversion phase, generating a digital output of the first sub ADC, and a second conversion phase, generating the analog residue. The first sub ADC includes a reference-voltage generator circuit configured to generate a reference voltage of the first sub ADC and having a first mode of operation and a second mode of operation, in which the noise power of the reference voltage is less than in the first mode of operation. The reference-voltage generator circuit is configured to operate in its first mode of operation in the first conversion phase and in its second mode of operation in the second conversion phase.