Pipelined ADC Search-Space Boundaries for Faster Conversion

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Solution Overview

Problem

Conventional pipelined analog to digital converters (ADCs) are limited by the need to wait for residue signals to settle before passing them to subsequent stages, which restricts processing speed and efficiency.

Innovation Solution

The approach processes the boundaries of the search space rather than the analog signal itself, allowing faster signal propagation through the pipeline by comparing and modifying the upper and lower boundary signals, enabling faster operation without compromising accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional pipelined ADCs wait for residue signals to settle before passing to subsequent stages, then measurement precision is maintained, but processing speed is restricted

Engineering Contradiction:
Improvemeasurement precisionVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing correction values that compensate for incomplete settling. Instead of waiting for signals to fully settle, the system performs correction in advance based on predetermined calibration data, allowing faster processing while maintaining precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by using the known settling characteristics of the circuit to apply corrective feedback signals. The system measures the actual settling behavior during calibration and uses this information to generate feedback corrections that compensate for incomplete settling during normal operation.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If conventional pipelined ADCs wait for residue signals to settle, then accuracy is maintained, but power consumption increases

Engineering Contradiction:
ImproveaccuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent performs settling correction in advance during a calibration phase, storing the correction values for later use. During normal conversion operations, the pre-computed corrections are applied without requiring additional settling time, thereby reducing power consumption while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses disposable calibration data that is computed once and then discarded after use. The calibration process creates temporary correction values that are used immediately and then replaced, avoiding the need for continuous high-power settling operations.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS11258453B2Analog to digital converter
Publication Date: 2022.02.22 SILICONINTERVENTION INC
  • US11258453B2 patent drawing
  • US11258453B2 patent drawing
  • US11258453B2 patent drawing

AI summary

A pipelined ADC that does not wait for the residue of a signal to settle to be delivered to the next stage of the pipeline, and thus passes signals to subsequent stages at faster than conventional speeds. A pipelined ADC is used that processes signals representing the boundaries of the search space. Thus, each stage does not necessarily receive the signal as pre-processed by the prior stage, but rather the search space boundaries as pre-processed by the prior stage. Reducing the “search space” of the ADC is equivalent to creating the residues in each step of a pipeline as in the prior art. An ADC operating in this fashion operates without error even if the residual search space boundary outputs from one state are presented to the next stage before the outputs have settled, and can run faster for a given power and bandwidth.