Pipelined ADC Shared Operational Amplifier Power Optimization
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Solution Overview
Problem
Analog-to-digital converters (ADCs) in electronic devices consume significant power, particularly in battery-powered devices, due to the high current consumption of operational amplifiers used in pipelined ADCs, which affects overall system power efficiency.
Innovation Solution
Sharing operational amplifiers between even and odd stages in a pipelined ADC, and using separate input stages to minimize coupling and reduce bias current waste, while optimizing the operational amplifier's usage during amplification phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If operational amplifiers are used in each stage of the pipelined ADC, then the conversion accuracy and speed are improved, but the power consumption increases significantly
Solution Approach 1:
The patent merges the operational amplifier resources across multiple stages by implementing a shared amplifier architecture. The same operational amplifier is reused in alternating stages (odd and even stages) of the pipelined ADC, reducing the total number of amplifiers required while maintaining the multi-stage conversion process. This directly addresses the power consumption issue by eliminating redundant amplifier instances.
Solution Approach 2:
The patent implements periodic action through time-multiplexed operation of the shared operational amplifier. The amplifier alternates between serving odd stages and even stages in a periodic manner, with each stage receiving amplifier service during its designated time window. This periodic sharing maintains the required conversion accuracy for each stage while significantly reducing overall power consumption compared to having dedicated amplifiers in every stage.
2Object-affected harmful factors
If dedicated operational amplifiers are allocated to each stage, then the isolation between stages is improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent applies segmentation by dividing the ADC operation into distinct time periods for odd stages and even stages. The shared operational amplifier is segmented in time, serving one set of stages during one period and another set of stages during the next period. This temporal segmentation maintains effective isolation between stages while reducing the total number of amplifiers needed, thereby reducing device complexity.
Solution Approach 2:
The patent introduces dynamics into the amplifier allocation by making the amplifier assignment time-varying rather than static. The shared operational amplifier dynamically switches between serving different stages based on the current conversion phase. This dynamic sharing approach maintains stage isolation through proper timing control while reducing the fixed hardware complexity of having dedicated amplifiers for each stage.
Data Source
AI summary
A pipelined analog to digital converter comprises N stages, wherein N is an integer greater than one. A sample and integrate circuit communicates with at least two stages of the N stages. The sample and integrate circuit selectively samples a first voltage input to one of the at least two stages while integrating a difference between a sampled second voltage input of another one of the at least two stages and a second reference voltage to generate a second residue. The sample and integrate circuit selectively integrates a difference between the sampled first voltage and a first reference voltage to generate a first residue while sampling a second voltage input.