Pipelined Audio Sample Synthesis for Power Efficiency

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Solution Overview

Problem

Existing devices face challenges in efficiently generating reconstructed audio samples while meeting industry standards for audio sample generation rate and quality, due to constraints on power consumption and device cost.

Innovation Solution

The implementation of a device with a processor that includes a first and second processing unit configured to operate in a pipelined configuration, where the first processing unit performs a first stage of a sample synthesis operation and the second processing unit performs a second stage based on the first unit's output, optimizing computational tasks and resource utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a single processing unit performs sequential sample synthesis operations, then device complexity is reduced, but power consumption per sample increases and processing speed decreases

Engineering Contradiction:
Improvepower consumption per sampleVSAvoidprocessing unit configuration
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The sample synthesis operation is divided into multiple stages (first stage, second stage, etc.), with each stage performed by a dedicated processing unit. This segmentation allows parallel execution of different stages, reducing the total time and energy required to generate each audio sample while distributing computational load across multiple units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-unit processing to parallel multi-unit processing by adding a temporal dimension to the computation pipeline. Multiple processing units operate simultaneously on different stages of sample synthesis, effectively converting a one-dimensional sequential process into a multi-dimensional parallel architecture.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If computational tasks are distributed across multiple processing units in parallel, then processing speed and efficiency improve, but device complexity and cost increase

Engineering Contradiction:
Improvesample generation rateVSAvoidprocessing unit configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The audio sample synthesis process is segmented into distinct computational stages, each handled by a specialized processing unit. This enables simultaneous execution of multiple stages, increasing the overall sample generation rate while keeping each individual processing unit relatively simple and manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first processing unit performs preliminary computational stages before passing intermediate results to subsequent processing units. This preliminary action allows later stages to begin processing earlier, overlapping computations in a pipeline fashion that accelerates overall sample generation without requiring all units to be fully complex.

Inventive Principle:
Principle #10Preliminary action

3Duration of action of moving object

If sequential processing is used to simplify device architecture, then manufacturing cost is reduced, but battery life decreases due to higher per-sample power consumption

Engineering Contradiction:
Improvebattery lifeVSAvoiddevice architecture
Core Design Contradiction:
Duration of action of moving objectVSEase of manufacture

Solution Approach 1:

By segmenting the sample synthesis workflow into multiple stages executed by separate processing units, the system reduces the computational burden and power consumption associated with each individual sample generation event. This segmentation enables more efficient resource utilization and lower overall power consumption, extending battery life despite increased architectural complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250046295A1Sample generation using pipelined processing units
Publication Date: 2025.02.06 QUALCOMM INC
  • US20250046295A1 patent drawing
  • US20250046295A1 patent drawing
  • US20250046295A1 patent drawing

AI summary

A device includes a memory configured to store instructions and a processor coupled to the memory. The processor includes a first processing unit configured to perform a first stage of a sample synthesis operation. The processor includes a second processing unit configured to perform a second stage of the sample synthesis operation based on an output of the first processing unit. The processor also includes a sample synthesizer configured to process input data, using the first processing unit and the second processing unit, to generate output data. The first processing unit and the second processing unit are configured to operate in a pipelined configuration that includes performance of the second stage at the second processing unit in parallel with performance of the first stage at the first processing unit.