Pipelined Data Detection Circuit With Memory Cancellation

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Solution Overview

Problem

Existing data processing systems are inefficient due to reliance on historical data across multiple stages, leading to delays and idle times as subsequent data sets are impacted by preceding data sets.

Innovation Solution

Implementing a data detection algorithm divided into pipelined stages with memory cancellation capabilities, allowing historical information to be reset at data set boundaries, enabling independent processing of subsequent data sets without delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If data detection relies on historical data from preceding states, then detection accuracy is maintained, but processing efficiency deteriorates due to delays and idle times

Engineering Contradiction:
Improvedetection accuracyVSAvoidprocessing efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The data detection algorithm is divided into multiple pipeline stages, where each stage processes a portion of the data independently. This segmentation allows different stages to work on different data sets simultaneously, eliminating the sequential dependency that causes idle times while maintaining the necessary historical context through controlled memory retention within each stage.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If sequential processing of data sets is used, then resource utilization is simplified, but throughput decreases due to idle times waiting for previous stages to complete

Engineering Contradiction:
Improveresource management simplicityVSAvoidthroughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

Subsequent pipeline stages are prepared and positioned in advance to process the next data set before the current data set has fully completed processing in earlier stages. This preliminary positioning of resources and data allows immediate continuation of processing without idle waiting time, significantly improving throughput while maintaining manageable resource utilization through structured pipeline control.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If memory cancellation is implemented at data set boundaries, then independence of data set processing is achieved, but additional control mechanisms increase system complexity

Engineering Contradiction:
Improvedata set independenceVSAvoidcontrol mechanism complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The historical data dependency is extracted and isolated to specific memory locations within the pipeline stages. By selectively retaining or canceling memory contents at data set boundaries, the system achieves clean separation between data sets. This extraction approach concentrates the control complexity into manageable memory management operations rather than requiring complex control logic throughout the entire system.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8634152B1Systems and methods for throughput enhanced data detection in a data processing circuit
Publication Date: 2014.01.21 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8634152B1 patent drawing
  • US8634152B1 patent drawing
  • US8634152B1 patent drawing

AI summary

Systems, methods, devices, circuits for data processing, and more particularly, and more particularly to data processing relying on efficiency improved data detection.