Pipelined Image Sensor Readout for Speed and Quality

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Solution Overview

Problem

Existing image sensors face challenges in achieving faster processing speeds and better image quality due to insufficient time for pixel operations and excessive noise from incomplete correlated double sampling, particularly in high-speed applications.

Innovation Solution

The implementation of a pipelined readout method that extends the sig1 and sig2 readout phases to last for one row time combined, allowing for extended pixel transfer time, and removing column ADC circuit autozeroing from row operations to allocate more time for pixel operations and analog-to-digital conversion, with autozeroing performed only once per frame.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional row-by-row readout is used, then image quality is maintained, but processing speed is limited due to insufficient time for pixel operations

Engineering Contradiction:
Improveprocessing speedVSAvoidimage quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The readout process is segmented into multiple phases: first signal readout (sig1), second signal readout (sig2), and analog-to-digital conversion. This segmentation allows pixel operations to be completed within one row time while enabling overlapping operations across different rows, thereby increasing processing speed without sacrificing image quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first signal (sig1) is readout and stored in column storage before the second signal (sig2) is readout. This preliminary action of storing sig1 allows the ADC conversion to start earlier and complete within the same row time, enabling faster processing while maintaining signal integrity for image quality.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If correlated double sampling is performed, then image quality improves, but noise increases due to incomplete sampling at high speeds

Engineering Contradiction:
Improveimage qualityVSAvoidnoise
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The pipelined readout method ensures continuous and complete correlated double sampling by reading both sig1 and sig2 signals fully within one row time. The column storage holds sig1 while sig2 is readout, and ADC conversion continuously processes the difference signal. This continuous action completes the sampling process without interruption, maintaining image quality while reducing noise through proper sampling completion.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If ADC conversion time is extended, then processing speed improves, but row readout time is insufficient

Engineering Contradiction:
Improveprocessing speedVSAvoidrow readout time
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent utilizes the time dimension by overlapping row operations across multiple rows. While one row is being readout, ADC conversion for previous rows is simultaneously occurring. This dimensional approach allows extended ADC conversion time without increasing the apparent row readout time, as operations are distributed across time and row dimensions simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

ADC conversion for a given row starts before the row readout is completely finished by using column storage to hold the first signal (sig1) from previous rows. This preliminary preparation of ADC conversion allows the conversion process to extend beyond the traditional row time constraint while maintaining proper readout timing through the pipelined structure.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9019411B2Image sensors and methods with pipelined readout
Publication Date: 2015.04.28 KRYMSKI ALEXANDER
  • US9019411B2 patent drawing
  • US9019411B2 patent drawing
  • US9019411B2 patent drawing

AI summary

A pipelined readout method in an image sensor includes receiving one or more signals from a pixel of a row of a pixel array into a column storage at least partially during a time that a previously sampled amplified output of the column storage that is based on signals provided by a previous pixel of a previously read out row of the pixel array is converted from analog to digital by an analog-to-digital conversion circuit. The method further includes performing, by the analog-to-digital conversion circuit, analog-to-digital conversion of a sampled amplified output of the column storage that is based on the one or more signals from the pixel at least partially during a time that the column storage receives at least one signal from a another pixel of a subsequently read out row of the pixel array.