Pointer-Based Pipelined Multibit Trie for High-Speed Lookup
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Solution Overview
Problem
Routers and switches face challenges in scaling to achieve high lookup throughput due to delays and inefficiencies in processing communication packets, particularly with variable width labels and database sizes, leading to network bottlenecks.
Innovation Solution
A system and method using a pointer-based pipelined multibit trie traversal technique that combines direct lookup and trie traversal to reduce the number of comparisons and improve search throughput, employing a dual-ported memory and pipelining to handle variable-width network address labels and database sizes efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional lookup methods are used, then implementation simplicity is maintained, but search throughput and latency performance deteriorate at high traffic rates
Solution Approach 1:
The patent segments the lookup process into multiple parallel stages: a first stage for processing most significant bits (MSBs) and a second stage for processing least significant bits (LSBs). Each stage operates independently with its own comparison logic, enabling parallel processing that significantly increases search throughput while maintaining manageable complexity through modular design.
Solution Approach 2:
The patent introduces a multi-dimensional comparison approach by processing bits in different significance dimensions simultaneously. Instead of sequential bit-by-bit comparison, the system performs MSB and LSB comparisons in parallel across multiple stages, effectively adding a temporal and structural dimension to the traditional linear search process.
2Loss of time
If comprehensive table lookup is performed, then search accuracy is maintained, but processing time and latency increase
Solution Approach 1:
The patent performs preliminary actions by first processing the most significant bits (MSBs) in an initial stage before proceeding to least significant bits (LSBs). This staged approach allows the system to quickly determine matches for the most critical bit portions, enabling early termination or prioritization that reduces overall latency while maintaining accuracy through systematic progression through all bit positions.
Solution Approach 2:
The patent ensures continuity of useful action by maintaining parallel processing pipelines where MSB and LSB comparison stages operate continuously and simultaneously. This continuous parallel execution eliminates idle waiting time between comparison stages, ensuring that lookup operations proceed without interruption and minimizing total processing latency while comprehensively checking all bits for accuracy.
3Adaptability or versatility
If variable width labels and database sizes are handled, then adaptability is improved, but computational requirements and complexity increase
Solution Approach 1:
The patent implements dynamics by designing a flexible lookup mechanism that can adapt to variable label widths and database sizes through configurable comparison stages. The system dynamically adjusts the number and configuration of MSB/LSB processing stages based on the specific label width requirements, allowing scalable deployment from 32-bit to 128-bit labels without fundamental architectural changes, thus managing complexity through parameterization rather than structural expansion.
Data Source
AI summary
A method and system for finding an exact match for an N-bit wide address. A system for finding an exact match for an N-bit wide address in every clock cycle includes a label extraction module and one or more pipeline blocks. The label extraction module extracts K bits from the N-bit wide address. The extracted K bits are used by pipeline block 1 as a key to directly lookup a base node of multibit trie. The base node is included in first lookup table (LUT) and first LUT is configured to store pointers to leaf nodes of multibit trie. A pipeline block 2 searches a current LUT for match on next Q bits of remaining (N−K) bits to retrieve a current pointer. Then, pipeline block (N−K)/Q finds the exact match by retrieving a unique search index matching remaining (N−K) bits when the current pointer is not empty.