Pipelined Read Optimization for SSD Cache Storage Systems

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Solution Overview

Problem

Traditional storage systems face challenges in balancing cost and performance when integrating SSDs as a caching layer, particularly in limiting write-erase cycles to extend SSD lifespan and improving read access latency while ensuring fault tolerance.

Innovation Solution

The integration of SSDs as a caching layer with a write-evict unit (WEU) structure that limits write-erase cycles and employs a Merkle tree file structure for efficient data management, allowing for parallel data retrieval from SSD and persistent storage units, and includes mechanisms for fault tolerance by invalidating failed data blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If SSDs are integrated as a caching layer to improve read access latency, then read performance is improved, but write-erase cycles increase which reduces SSD lifespan

Engineering Contradiction:
Improveread access latencyVSAvoidSSD lifespan
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The patent changes the parameter of data organization by implementing a write-evict unit structure that groups data into fixed-size units. This allows the system to track and limit write operations at the unit level rather than individual block level, thereby controlling write-erase cycles while maintaining fast read access through SSD caching.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces a cache management system as an intermediary between the host and SSD cache layer. This intermediary implements policies to manage write operations, track write-erase cycles, and coordinate with persistent storage, thereby protecting the SSD from excessive write operations while maintaining caching performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If SSD cache is used to improve read performance, then read access latency decreases, but system complexity increases due to cache management requirements

Engineering Contradiction:
Improveread access latencyVSAvoidcache management complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the cache into fixed-size write-evict units with standardized structures containing metadata and data portions. This segmentation simplifies management by providing uniform units for tracking, allocating, and evicting data, reducing the complexity of cache management operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the organizational parameter of cache data from arbitrary blocks to fixed-size write-evict units with defined structures. This standardization simplifies management logic by providing consistent unit sizes and metadata formats, making cache operations more predictable and easier to manage.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If data is replicated to primary system for backup, then fault tolerance is improved, but read access latency increases due to storage system latency

Engineering Contradiction:
Improvefault toleranceVSAvoidread access latency
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent introduces an SSD-based cache layer as an intermediary between persistent storage and the primary system. This cache layer provides fast read access to frequently accessed data while maintaining fault tolerance through replication, thereby reducing read latency without sacrificing reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies local quality by placing frequently accessed data in the SSD cache layer closer to the processor, while less frequently accessed data remains in persistent storage. This creates a hierarchical structure where hot data benefits from fast local access while cold data maintains fault tolerance in persistent storage.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10733105B1Method for pipelined read optimization to improve performance of reading data from data cache and storage units
Publication Date: 2020.08.04 EMC IP HLDG CO LLC
  • US10733105B1 patent drawing
  • US10733105B1 patent drawing
  • US10733105B1 patent drawing

AI summary

According to some embodiments, a backup storage system receives a request from a client at a storage system for accessing data segments. For each of a first groups of the data segments requested that are stored in a solid state device (SSD) cache, the system requests a first batch job for each of the first groups to retrieve the first groups of the data segments from the SSD cache via a first set of input/output (IO) threads. For each of a second groups of the data segments requested that are not stored in the SSD cache, the system requests a second batch job for each of the second groups to retrieve the second groups of the data segments from storage units of the storage system via a second set of input/output (IO) threads. The system assembles received segments and returns them to the client altogether.