Pipelined Ring Network for SIMD/MIMD Processing Elements
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Solution Overview
Problem
Existing dual mode SIMD/MIMD architectures require complex crossbars for data transfer between external memory and processing elements, leading to large wiring area requirements and inefficient use of processing elements.
Innovation Solution
A pipelined bus system, preferably formed as a ring, connects all processing elements and a global data transfer control unit sequentially, with an access controller managing data access timing to reduce wiring area needs and improve network efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a complex crossbar is used for data transfer between external memory and processing elements, then data transfer capability is improved, but wiring area requirements increase significantly
Solution Approach 1:
The patent segments the monolithic crossbar into multiple smaller crossbars organized in a hierarchical structure. Each processing element group has its own local crossbar, and these are connected to a global crossbar through intermediate switches. This segmentation reduces the wiring area required for each individual crossbar while maintaining overall data transfer capability through the hierarchical interconnection.
Solution Approach 2:
The patent introduces a hierarchical dimension to the data transfer architecture, organizing crossbars in multiple levels (local, intermediate, global) rather than using a single flat crossbar. This dimensional organization allows data transfer to occur through multiple stages, reducing the direct wiring burden on any single crossbar while preserving system-wide connectivity and transfer capability.
2Adaptability or versatility
If processing elements are configured for dual mode SIMD/MIMD operation, then processing flexibility is improved, but control complexity increases
Solution Approach 1:
The patent implements dynamic reconfiguration capability where processing elements can switch between SIMD and MIMD modes based on the computational task requirements. The control system dynamically adjusts the operational mode of processing elements and configures the interconnection network accordingly, allowing the system to adapt its control structure to match the workload characteristics rather than being fixed in one mode.
Solution Approach 2:
The patent designs the processing elements and control system to perform multiple functions - they can operate in both SIMD and MIMD modes, and the interconnection network can be configured for different topologies (mesh, hypercube, etc.). This multi-functionality is achieved through programmable control logic that can implement different control algorithms and data routing strategies depending on the operational mode required.
Data Source
AI summary
A processor of SIMD/MIMD dual mode architecture comprises common controlled first processing elements, self-controlled second processing elements and a pipelined (ring) network connecting the first PEs and the second PEs sequentially. An access controller has access control lines, each access control line being connected to each PE of the first and second PEs to control data access timing between each PE and the network. Each PE can be self-controlled or common controlled, such as dual mode SIMD/MIMD architectures, reducing the wiring area requirement.