Pipelining Post-Quantum Signature Generation
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Solution Overview
Problem
Existing methods for post-quantum safe signature generation face challenges in efficiently handling a high number of requests and real-time communication, particularly due to indeterminable processing times and random loop iterations in algorithms like DILITHIUM.
Innovation Solution
A computer-implemented and/or hardware-implemented method for pipelining data processing, which involves generating a unique ID (UID) for input data, using a pipeline module with delay modules to manage processing time, and implementing branching logic based on condition checking to optimize the pipelining process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional sequential processing is used for post-quantum cryptographic algorithms, then processing correctness is ensured, but throughput is limited due to indeterminable processing time
Solution Approach 1:
The cryptographic processing is divided into multiple independent pipeline stages (preprocessing, hashing, condition checking, finalization). Each stage processes data independently and simultaneously, allowing multiple operations to proceed in parallel rather than sequentially, thereby increasing throughput while maintaining correctness through structured data flow control
Solution Approach 2:
Processing operations are initiated in advance before their completion is known. The pipeline continuously accepts and processes input data without waiting for previous operations to finish, using buffer management and completion flags to ensure correctness. This allows the system to maintain full utilization and achieve deterministic throughput despite indeterminate individual operation times
2Productivity
If pipeline parallelism is implemented, then throughput is improved, but system complexity increases due to managing indeterminate loop iterations
Solution Approach 1:
The pipeline incorporates feedback mechanisms where completion flags and buffer status information are continuously monitored and used to control data flow. When a processing stage completes, it signals downstream stages to proceed, and when buffers are full or empty, upstream stages are inhibited. This feedback control manages the complexity of indeterminate iterations by providing deterministic control signals based on actual completion status
Solution Approach 2:
Completion flags and buffer management structures serve as intermediaries between pipeline stages. These intermediaries decouple the stages from direct dependency, allowing each stage to operate independently while maintaining coordination through standardized interfaces. This reduces overall system complexity by localizing control logic at stage boundaries rather than requiring global coordination
3Ease of operation
If buffering is used to manage pipeline stages, then data flow control is improved, but memory usage increases
Solution Approach 1:
Instead of using large centralized buffers, the patent implements small localized buffers at each pipeline stage interface. Each buffer is sized only to hold enough data to bridge the gap between adjacent stages, rather than buffering entire datasets. This local buffering approach provides sufficient data flow control while minimizing total memory consumption across the pipeline
Data Source
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AI summary
In order to improve the performance of post-quantum safe signature generation, preferably for a high number of requests and/or real-time communication the invention proposes a method for pipelining data processing, where at least one data processing step takes an a priori indeterminable amount of processing time. The method involves generating a unique ID (UID) and associating that UID with the input data (32); feeding the input data (32) and the UID to a pipeline module (52) that includes a data processing module (40, 44) and a processing delay module (54); delaying outputting the UID by the processing delay module (54) for a delay time that corresponds to an amount of processing time required by the data processing module (40, 44) for a single iteration, wherein, in response to the branching part (44) determining that the condition is one of met or not met, the pipeline module (52) re-inputs the UID into the processing delay module (54), wherein, in response to the branching part (44) determining that the condition is the other one of met or not met, the processing delay module (54) outputs the UID thereby unblocking the transmission of further input data (32) to the processing module (40, 44), and the processing module (40, 44) outputs processed data (48) as output data.