Pit-Less Metal Interconnect CMP Using a Dual-Metal Cap
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Solution Overview
Problem
Chemical mechanical polishing processes in semiconductor manufacturing often result in the formation of local pits on metal interconnect structures due to seams in the deposited metallic material, which can trap slurries and affect the reliability and durability of the structures.
Innovation Solution
A dual metallic material deposition process is employed, where a metallic capping material with higher hardness than the fill material is deposited over the metallic fill material in the recess cavities, providing increased polishing resistance and preventing pit formation during the CMP process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single metallic fill material is deposited in recess cavities, then the deposition process is simple, but local pits form during CMP due to seams in the deposited material
Solution Approach 1:
The patent applies composite materials by depositing a dual metallic material structure consisting of a first metallic material (e.g., copper) and a second metallic material (e.g., aluminum or aluminum alloy) with different polishing rates. The second metallic material is deposited over the first metallic material in the recess cavity, creating a composite structure where the higher polishing rate material prevents pit formation by being removed preferentially during CMP, while the lower polishing rate material forms the reliable interconnect structure.
2Ease of operation
If conventional CMP is used on single metallic material, then the process is straightforward, but slurry gets trapped in seams causing local pits
Solution Approach 1:
The patent applies parameter changes by utilizing the difference in polishing rates between two metallic materials. The second metallic material (e.g., aluminum) has a higher polishing rate than the first metallic material (e.g., copper), causing the second material to be removed preferentially during CMP. This parameter difference prevents slurry trapping by eliminating seam formations, as the materials polish at different rates rather than forming hard seams that trap slurry.
3Manufacturing precision
If metallic fill material is deposited to fill recess cavities, then interconnect structures are formed, but seams in the material lead to pit formation during polishing
Solution Approach 1:
The patent applies preliminary action by depositing the second metallic material over the first metallic material before the CMP process occurs. This preliminary dual-material deposition creates a structure where the second material (higher polishing rate) acts as a protective layer that prevents pit formation during subsequent polishing, as it removes preferentially and prevents slurry from becoming trapped at seams.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents the formation of local pits, enhancing the reliability and durability of metal interconnect structures by reducing slurry trapping and surface roughness, thereby improving the overall performance and longevity of the semiconductor devices.
Implementation Method 1
a metallic capping material layer 42C comprising a metallic material having a second Young's modulus greater than the first Young's modulus may be deposited by a physical vapor deposition process
Implementation Method 2
portions of the layer stack 42A-42C above the horizontal plane 65 including a top surface of the metallic-stack-based-interconnect-level dielectric material layer 640 may be removed by a chemical mechanical polishing process
Data Source
AI summary
A cavity may be formed in a dielectric material layer overlying a substrate. A layer stack including a metallic barrier liner, a metallic fill material layer, and a metallic capping material may be deposited in the cavity and over the dielectric material layer. Portions of the layer stack located above a horizontal plane including a top surface of the dielectric material layer may be removed. A contiguous set of remaining material portions of the layer stack includes a metal interconnect structure that is free of a pitted surface.


