Pixel Arranging Apparatus for Image Sensor Data Processing
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Solution Overview
Problem
Solid-state image sensing apparatuses face challenges in reducing pixel numbers while maintaining high-quality image output without generating moire or false signals, especially when reducing pixels in the horizontal direction.
Innovation Solution
A pixel arranging apparatus that acquires, extracts, and rearranges pixel data from a solid-state image sensing device, allowing for the output of high-quality image signals at high speeds by selectively processing and rearranging pixel data, including the use of a storage unit, address control, and line memories to manage and rearrange pixel data efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pixel data is reduced in the horizontal direction by mixing signal charges of multiple pixels, then the number of pixels to be processed is reduced and output speed is improved, but moire or false signals are generated and image quality is degraded
Solution Approach 1:
The patent divides the pixel array into multiple independent blocks in the horizontal direction, where each block processes pixel data separately. This segmentation prevents the generation of moire patterns that occur when adjacent pixels are mixed, while still achieving pixel reduction within each block. The independent block processing maintains image quality by avoiding the interference patterns that would otherwise be generated across the entire pixel array.
Solution Approach 2:
The patent applies different processing methods to different regions of the pixel array. Specifically, pixel mixing is applied within local blocks to reduce pixel count, while the block structure itself prevents the propagation of moire patterns. This local processing approach allows pixel reduction to be achieved without compromising overall image quality, as each local region is processed independently with appropriate quality control.
2Loss of time
If the number of pixels is reduced to increase output speed, then data processing time is reduced, but the sampling frequency component is added to DC component and false signals are generated
Solution Approach 1:
By segmenting the pixel array into independent blocks, the patent eliminates the generation of false signals that occur when pixel data is mixed across the entire array. Each block processes its own pixel data independently, preventing the addition of sampling frequency components to the DC component that would create false signals. This segmentation approach maintains signal integrity while still achieving faster processing through reduced pixel counts within each block.
3Quantity of substance
If pixel data is extracted and rearranged to reduce pixel numbers, then the quantity of data to be processed is reduced, but complex data management and rearrangement operations are required
Solution Approach 1:
The patent organizes pixel data into regular block structures with consistent dimensions, which simplifies the extraction and rearrangement operations. Each block contains a fixed number of pixels arranged in a predictable pattern, making data management more straightforward despite the pixel reduction. This structured approach reduces the complexity of data handling compared to irregular pixel sampling methods.
Solution Approach 2:
The patent performs pixel data extraction and block formation as preliminary operations before final image processing. By organizing the data into blocks and extracting relevant pixel information in advance, the system simplifies subsequent processing steps. This preliminary organization of data reduces the overall complexity of data management throughout the processing pipeline.
Data Source
AI summary
A solid-state image sensing apparatus including a solid-state image sensing device and a signal processing circuit. The solid-state image sensing device includes: a vertical transfer unit, composed of transfer columns corresponding to columns of the light-to-electric conversion elements, operable to transfer, in a vertical direction, signal charges read out from the light-to-electric conversion elements; a horizontal transfer unit operable to receive the signal charges from the vertical transfer unit and transfer them in a horizontal direction. The signal processing circuit converts the signal charges from the horizontal transfer unit into pixel data, and rearranges it into a two-dimensional array. In the rearrangement, the signal processing circuit, per transfer of one piece of pixel data, cyclically selects a line memory out of three line memories, writes a piece of pixel data into the selected line memory, or reads a row of pixel data from the selected line memory.