Pixel Array Bias Signal Generation from Gate Control Signals

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Solution Overview

Problem

Conventional voltage source or current source circuits for pixel arrays require a complicated bias signal generation IC to provide the bias signal, increasing circuit cost and complexity.

Innovation Solution

An electronic device with a pixel array, a gate driver, and a bias signal driver that generates a bias signal using a first and second logic circuit, eliminating the need for a separate bias signal generation IC by utilizing gate control signals to activate pixel units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate bias signal generation IC is added to provide the bias signal, then the bias signal can be provided to pixel units, but the circuit cost and complexity increase

Engineering Contradiction:
Improvebias signal provisionVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the bias signal generation function into the existing gate driver IC by adding logic circuits (such as NOR gates or NAND gates) that generate bias signals from existing gate control signals. This eliminates the need for a separate bias signal generation IC, thereby reducing circuit complexity while maintaining the ability to provide bias signals to pixel units for proper operation and threshold voltage compensation.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If a separate bias signal generation IC is added to provide the bias signal, then the bias signal can be provided to pixel units, but the circuit cost increases

Engineering Contradiction:
Improvebias signal provisionVSAvoidcircuit cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines the bias signal generation function with the existing gate driver IC, eliminating the need for a separate component. This merging reduces the total component count and assembly requirements, directly lowering manufacturing costs while ensuring reliable bias signal provision to all pixel units in the display panel.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If conventional voltage source or current source circuits are used without bias signal generation capability, then the circuit design is simpler, but the bias signal cannot be provided to pixel units

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidbias signal provision
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent enhances the gate driver IC to perform multiple functions: it continues to provide gate control signals for scanning and resetting pixel units while simultaneously generating bias signals through integrated logic circuits. This multi-functional design maintains circuit simplicity while ensuring reliable bias signal provision, allowing the same IC to serve both control and signal generation purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4283604A1Electronic device
Publication Date: 2023.11.29 INNOLUX CORP
  • EP4283604A1 patent drawingFigure 1
  • EP4283604A1 patent drawingFigure 2
  • EP4283604A1 patent drawingFigure 3

AI summary

An electronic device (100) is provided. The electronic device (100) includes a pixel array (101), a gate driver (110) and a bias signal driver (120, 420, 520, 720, 920, 1120, 1220, 1320, 1420). The pixel array (101) includes a pixel unit (140, 240). The gate driver (110) generates a plurality of gate control signals Gate_(n-2) to Gate_(n+2). The bias signal driver (120, 420, 520, 720, 920, 1120, 1220, 1320, 1420) is electrically connected to the pixel unit (140, 240) and the gate driver (110), and configured to generate a bias signal to activate the pixel unit (140, 240) according to a part of the plurality of gate control signals Gate_(n-2) to Gate_(n+2). The bias signal driver (120, 420, 520, 720, 920, 1120, 1220, 1320, 1420) includes a first logic circuit (421, 521, 721, 921, 1121, 1221, 1321, 1421) and a second logic circuit.