Pixel Array Layout for Balanced Data-Line Coupling
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Solution Overview
Problem
The increased resolution and refresh frequency of display panels lead to higher risks of chip on film (COF) bonding failure and increased costs, as well as issues with unequal coupling capacitances between pixels and data lines, resulting in poor display quality and vertical crosstalk.
Innovation Solution
A pixel array design where two adjacent data lines transmit signals with opposite polarities, with branch portions extending between columns of pixels, ensuring equal coupling capacitances on both sides of each pixel, and a common electrode with slits to reduce excessive coupling capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution and refresh frequency of display panels are increased, then the display quality is improved, but the number of chip on film (COF) installed in the source driver increases, leading to increased risk of bonding failure and increased costs
Solution Approach 1:
The patent merges the functions of multiple data lines into a shared data line structure. Specifically, one data line serves multiple pixel columns by extending and branching to connect to pixels in different columns, thereby reducing the total number of COF components needed in the source driver while maintaining high resolution display capabilities
2Measurement precision
If the resolution and refresh frequency of display panels are increased, then the display quality is improved, but the costs increase due to disposing multiple COFs
Solution Approach 1:
The patent merges the functions of multiple data lines into a shared data line structure. Specifically, one data line serves multiple pixel columns by extending and branching to connect to pixels in different columns, thereby reducing the total number of COF components needed in the source driver while maintaining high resolution display capabilities
3Device complexity
If pixels are arranged in different columns connected to a same data line (DLS structure), then the number of COFs is reduced to half, but unequal coupling capacitances between each pixel and two adjacent data lines cause poor display quality and vertical crosstalk
Solution Approach 1:
The patent applies local quality by making the data line structure asymmetric relative to each pixel. Specifically, for pixels in even columns, the left data line is configured as a trunk portion with larger width, while for pixels in odd columns, the right data line is configured as a trunk portion with larger width. This local asymmetry compensates for the unequal coupling capacitances caused by the DLS structure, ensuring equal total coupling capacitance on both sides of each pixel and eliminating vertical crosstalk while maintaining reduced device complexity
4Device complexity
If pixels are arranged in different columns connected to a same data line (DLS structure), then the number of COFs is reduced to half, but the risk of bonding failure increases
Solution Approach 1:
The patent merges the functions of multiple data lines into a shared data line structure. Specifically, one data line serves multiple pixel columns by extending and branching to connect to pixels in different columns, thereby reducing the total number of COF components needed in the source driver while maintaining high resolution display capabilities
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves display quality by canceling out unequal coupling capacitances, reducing the risk of bonding failure and costs, and enhancing panel charging efficiency.
Implementation Method 1
a coupling capacitance CpdL between the green pixel G and the first data line D1 is much larger than a coupling capacitance CpdR between the green pixel G and the second data line D2
Data Source
AI summary
A pixel array, a display panel, and a display device are provided. The pixel array includes a first pixel electrode, a first data line, and a second data line. The first pixel electrode includes a first side and a second side opposite to the first side. The first data line is electrically connected to the first pixel electrode. The first data line is adjacent to the first side of the first pixel electrode and extends to the second side. The second data line is adjacent to the first data line. At least a portion of the second data line is disposed between the second side and the first data line. The first data line and the second data line are respectively configured to transmit signals with opposite polarities.