Pixel Array Driving Circuit with Split Write and Output Timing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing pixel array circuits in electronic devices face issues with uneven data updates due to the influence of material properties, leading to incomplete or delayed updates in power-consuming devices like exposure and three-dimensional printing devices.
Innovation Solution
Implementing a frame time structure with distinct writing and output periods, where power-consuming devices receive energy during the output period and store data during the writing period, using transistors and capacitors to ensure synchronized and complete data updates across all array units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If sequential data updating method is used in pixel array circuits, then data continuity is maintained through energy storage elements, but uneven data updates occur across array units due to material properties influencing power-consuming devices
Solution Approach 1:
The frame time is segmented into distinct writing period and output period, allowing separate control of data input and power consumption phases. This temporal segmentation enables all array units to receive data simultaneously during the writing period while preventing interference during the output period, resolving the contradiction between maintaining data continuity and achieving uniform data updates across the array.
Solution Approach 2:
The patent implements periodic voltage level changes at the second end of the transistor, switching between first voltage level during writing period and second voltage level during output period. This periodic action synchronizes power consumption operations across all array units, ensuring uniform data updates while maintaining stability through the cyclic nature of the operation.
2Productivity
If overall data updates are performed for all array units simultaneously, then complete data refresh is achieved, but interference occurs between array units due to material properties of power-consuming devices
Solution Approach 1:
Data is written to all array units simultaneously during the writing period before the output period begins. This preliminary action ensures complete data refresh across the array while the subsequent output period isolates the power consumption operations, preventing interference and maintaining data update accuracy.
Solution Approach 2:
The voltage level at the second end of the transistor acts as an intermediary control mechanism, enabling simultaneous data updates across all array units during the writing period while blocking interference during the output period. This intermediary control allows complete and accurate data updates by mediating between the need for simultaneous operation and the prevention of interference.
Data Source
AI summary
An operation method for an electronic device includes steps of: providing a first transistor having a first end and a second end; providing a power consuming device electrically connected to the first end of the first transistor; and providing a signal source electrically connected to the second end of the first transistor, wherein, in a frame time including a writing period and an output period, the signal source provides a high voltage level during the output period, and the signal source provides a low voltage level during the writing period.